| Electronic Components Datasheet Search |
|
HD64F2145 Datasheet(PDF) 294 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F2145 Datasheet(HTML) 294 Page - Renesas Technology Corp |
|
294 / 829 page ![]() Rev. 2.0, 08/02, page 254 of 788 ø External clock input pin FRC input clock FRC N + 1 N Figure 11.4 Increment Timing with External Clock Source 11.5.2 Output Compare Output Timing A compare-match signal occurs at the last state when the FRC and OCR values match (at the timing when the FRC updates the counter value). When a compare-match signal occurs, the level selected by the OLVL bit in TOCR is output at the output compare pin (FTOA or FTOB). Figure 11.5 shows the timing of this operation for compare-match A. ø FRC OCRA NN N + 1 N + 1 NN Compare-match A signal OLVLA Output compare A output pin FTOA Clear* Note : * Indicates instruction execution by software. Figure 11.5 Timing of Output Compare A Output |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |