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VSC7511 Datasheet(PDF) 51 Page - Microsemi Corporation |
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VSC7511 Datasheet(HTML) 51 Page - Microsemi Corporation |
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51 / 324 page ![]() Functional Descriptions VMDS-10488 VSC7511 Datasheet Revision 4.2 36 3.5.1.1 Broadcast Write The PHYs can be configured to accept MII PHY register write operations, regardless of the destination address of these writes. This is enabled in PHY_CTRL_STAT_EXT::BROADCAST_WRITE_ENA. This enabling allows similar configurations to be sent quickly to multiple PHYs without having to do repeated MII PHY write operations. This feature applies only to writes; MII PHY register read operations are still interpreted with “correct” address. 3.5.1.2 Register Reset The PHY can be reset through software, enabled in PHY_CTRL::SOFTWARE_RESET_ENA. Enabling this field initiates a software reset of the PHY. Fields that are not described as sticky are returned to their default values. Fields that are described as sticky are only returned to defaults if sticky-reset is disabled through PHY_CTRL_STAT_EXT::STICKY_RESET_ENA. Otherwise, they retain their values from prior to the software reset. A hardware reset always brings all PHY registers back to their default values. 3.5.2 Cat5 Twisted Pair Media Interface The twisted pair interfaces are compliant with IEEE 802.3-2008 and IEEE 802.3az for Energy Efficient Ethernet. 3.5.2.1 Voltage-Mode Line Driver Unlike many other gigabit PHYs, this PHY uses a patented voltage-mode line driver that allows it to fully integrate the series termination resistors (required to connect the PHY’s Cat5 interface to an external 1:1 transformer). Also, the interface does not require placement of an external voltage on the center tap of the magnetic. The following illustration shows the connections. Figure 10 • Cat5 Media Interface TXVPA_ n TXVNA_ n TXVPB_ n TXVNB_ n TXVPC_ n TXVNC_ n TXVPD_ n TXVND_ n PHY Port_n Transformer A+ A– B+ B– C+ C– D+ D– 1 2 3 6 4 5 7 8 RJ-45 75 Ω 75 Ω 75 Ω 75 Ω 1000 pF, 2 kV 0.1 µF 0.1 µF 0.1 µF 0.1 µF |
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