W7500P datasheet(5/38 Pages) WIZNET

5 / 38 page

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List of figures

Figure 1. W7500x System Architecture ....................................................... 8

Figure 2. CRG block diagram..................................................................11

Figure 3 Typical application with an 8 MHz crystal ........................................12

Figure 4. function schematic of digital I/O pad............................................14

Figure 5. function schematic of digital/analog mux IO pad ..............................14

Figure 6. External Interrupt diagram ........................................................18

Figure 7 W7500 pin layout.....................................................................23

Figure 8 W7500P pin layout ...................................................................23

Figure 9 Power Down operation Timing Sequence for PLL ................................34

Figure 11. SSP Timing for SPI Frame format, with SPH =1 ................................35

Figure 12. Package Dimension Information .................................................36

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