W7500P datasheet(14/38 Pages) WIZNET

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3.9 General-purpose inputs/outputs (GPIOs)

The GPIO(General-Purpose I/O Port) is composed of three physical GPIO blocks, each

corresponding to an individual GPIO port(PORT A, PORT B and PORT C). The GPIO supports up

to 34 programmable input/output pins, depending on the peripherals being used.



The GPIO peripheral consists the following features.

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GPIO_DATAOUT can SET/CLEAR by the SET register and CLEAR register. (1 for set and

0 for clear)

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Mask registers allow treating sets of port bits as a group leaving other bits unchanged.

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Up to 34 GPIOs depending on configuration

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Programmable control for GPIO interrupts

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Interrupt generation masking



Edge-triggered on rising, falling, or both

Refer to ‘Reference Manual’ for more details about each register.

3.10 Pad controller (PADCON)

Pads of W7500x are controllable. User can control pad’s characteristic.

W7500x has digital I/O pads and digital/analog mux I/O pads

Controllable characteristics of pads are pull-up, pull-down, driving strength, input enable, and

CMOS/Schmitt trigger input buffer

Each pad can be controlled individually by register.

Figure 4 shows the function schematic of digital I/O pad of W7500x.

Figure 4. function schematic of digital I/O pad

Figure 5 shows the function schematic of digital/analog mux IO pad of W7500x

Figure 5. function schematic of digital/analog mux IO pad

W7500P Datasheet(PDF) 14 Page - WIZnet Co., Ltd