Z8F082ASH020SC datasheet(120/244 Pages) ZILOG

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PS024705-0405

P R E L I M I N A R Y

UART

Z8 Encore! XP® F08xA Seriess

Product Specification

102

The baud rate error relative to the acceptable baud rate is calculated using the following

equation:

For reliable communication, the UART baud rate error must never exceed 5 percent.

Table 69 provides information about data rate errors for popular baud rates and commonly

used crystal oscillator frequencies.

Table 69. UART Baud Rates

10.0 MHz System Clock

5.5296 MHz System Clock

Acceptable

Rate (KHz)

BRG Divisor

(Decimal)

Actual Rate

(KHz)

Error

(%)

Acceptable

Rate (KHz)

BRG Divisor

(Decimal)

Actual Rate

(KHz)

Error

(%)

1250.0

N/A

1250.0

N/A

625.0

0.00

625.0

N/A

250.0

208.33

-16.67

250.0

345.6

38.24

115.2

125.0

8.51

115.2

0.00

57.6

56.8

-1.36

57.6

0.00

38.4

39.1

1.73

38.4

0.00

19.2

18.9

0.16

19.2

0.00

9.60

9.62

0.16

9.60

0.00

4.80

130

4.81

0.16

4.80

0.00

2.40

260

2.40

-0.03

2.40

144

2.40

0.00

1.20

521

1.20

-0.03

1.20

288

1.20

0.00

0.60

1042

0.60

-0.03

0.60

576

0.60

0.00

0.30

2083

0.30

0.2

0.30

1152

0.30

0.00

UART Baud Rate Divisor Value (BRG)

Round

System Clock Frequency (Hz)

UART Data Rate (bits/s)

----------------------------------------------------------------------------

⎝⎠

⎛⎞

UART Baud Rate Error (%)

100

Actual Data Rate

Desired Data Rate

–

Desired Data Rate

-------------------------------------------------------------------------------------------------

⎝⎠

⎛⎞

Z8F082ASH020SC Datasheet(PDF) 120 Page - Zilog, Inc.

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