PC8374L datasheet(113/239 Pages) NSC

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6.0 General-Purpose Input/Output (GPIO) Ports (Continued)

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6.3 EVENT HANDLING AND SYSTEM NOTIFICATION

The enhanced GPIO port (GPIOE) supports system notification based on event detection. This functionality is based on

configuration bits and a bit slice of runtime registers GPEVEN and GPEVST. The configuration and operation of the event

detection capability is shown in Figure 17. System notification is described in Section 6.3.2.

Figure 17. Event Detection

6.3.1

Event Configuration

Each pin in the GPIO port is a potential input event source. The event detection can trigger a system notification on predeter-

mined behavior of the source pin. The GPCFG1 register determines the event detection trigger type for system notification.

Event Debounce Enable

The input signal can be debounced for at least 16 ms, before entering the detector. To ensure that the signal is stable, the

signal state is transferred to the event detector only after a debouncing period during which the signal has no transitions.

The debouncer adds a delay equal to the debouncing period to both assertion and de-assertion of the event pending indi-

cator (IRQ, SMI, SCI). The debounce is controlled by Event Debounce Enable (bit 6 of GPCFG1 register).

Event Type and Polarity

Two trigger types of event detection are supported: edge and level. An edge event may be detected on a source pin transi-

tion either from high to low or low to high. A level event may be detected when the source pin is either at high or low level.

The trigger type is determined by Event Type (bit 4 of GPCFG1 register). The direction of the transition (for edge) or the

polarity of the active level (for level) is determined by Event Polarity (bit 5 of GPCFG1 register).

Active edge refers to a change in a GPIO pin level that matches the Event Polarity bit (1 for rising edge and 0 for falling

edge). Active level refers to the GPIO pin level that matches the Event Polarity bit (1 for high level and 0 for low level). The

corresponding bit in GPEVST register is set by hardware whenever an active edge or an active level is detected regardless

of the GPEVEN register setting. Writing 1 to the Status bit clears it to 0. Writing 0 is ignored.

A GPIO pin is in event pending state if an active event has occurred (the corresponding bit in GPEVST register is set) and

the corresponding bit in GPEVEN register is set.

Event

Enable

Event Polarity

Input

Debouncer

Event

Internal

Bus

Level =1

Write 1 to Clear

Status

Rising Edge or

Rising

Edge

Detector

High Level =1

GPIO Pin Conﬁguration Register 1

Event Type

Event

Debounce

Enable

R/W

Bit 6

Bit 5

Bit 4

Indication

Pending

(GPCFG1)

Reset

Set

GPIO Event Indication to SWC

Read

GPIO

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PC8374L Datasheet(PDF) 113 Page - National Semiconductor (TI)

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