CLRC663 datasheet(36/177 Pages) NXP

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NXP Semiconductors

CLRC663

High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus

8.4.6.10 Non-IEEE1149.1 commands

Interface on/off

With this command, the host/SAM interface can be deactivated and the Read and Write command of the

boundary scan interface is activated. (Data = 1). With Update-DR, the value is taken over.

At Capture-DR, the actual address is read and stored in the DR. Shifting the DR is shifting in a new address.

With Update-DR, this address is taken over into the actual address.

At the Capture-DR, the address and the data is taken over from the DR. The data is copied into the internal

8.5 Buffer

8.5.1 Overview

A 512 × 8-bit FIFO buffer is implemented in the CLRC663. It buffers the input and output data stream between

the host and the internal state machine of the CLRC663. Thus, it is possible to handle data streams with lengths

of up to 512 bytes without taking timing constraints into account. The FIFO can also be limited to a size of 255

bytes. In this case all the parameters (FIFO length, Watermark...) require a single byte only for definition. In

case of a 512 byte FIFO length, the definition of this value requires 2 bytes.

8.5.2 Accessing the FIFO buffer

When the μ-Controller starts a command, the CLRC663 may, while the command is in progress, access the

FIFO-buffer according to that command. Physically only one FIFO-buffer is implemented, which can be used in

input and output direction. Therefore the μ-Controller has to take care, not to access the FIFO buffer in a way

that corrupts the FIFO data.

8.5.3 Controlling the FIFO buffer

Besides writing to and reading from the FIFO buffer, the FIFO-buffer pointers might be reset by setting the bit

FIFOFlush in FIFOControl to 1. Consequently, the FIFOLevel bits are set to logic 0, the actually stored bytes

are not accessible any more and the FIFO buffer can be filled with another 512 bytes (or 255 bytes if the bit

FIFOSize is set to 1) again.

8.5.4 Status Information about the FIFO buffer

The host may obtain the following data about the FIFO-buffers status:

• Number of bytes already stored in the FIFO-buffer. Writing increments, reading decrements the FIFO level:

FIFOLength in register FIFOLength (and FIFOControl Register in 512 byte mode)

• Warning, that the FIFO-buffer is almost full: HiAlert in register FIFOControl according to the value of the water

level in register WaterLevel (Register 02h bit [2], Register 03h bit[7:0])

• Warning, that the FIFO-buffer is almost empty: LoAlert in register FIFOControl according to the value of the

water level in register WaterLevel (Register 02h bit [2], Register 03h bit[7:0])

• FIFOOvl bit indicates, that bytes were written to the FIFO buffer although it was already full: ErrIRQ in register

IRQ0.

CLRC663

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Product data sheet

Rev. 5.3 — 3 January 2024

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