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CLRC663 Datasheet(PDF) 90 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 90 Page - NXP Semiconductors |
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90 / 177 page ![]() NXP Semiconductors CLRC663 High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus Bit Symbol Description • 1h: Symbol0 is sent • 2 h symbol1 is sent • 3h Symbol2 is sent 1 to 0 StartSym Defines which symbol is sent as start-symbol: • 0h: No Symbol is sent • 1h: Symbol0 is sent • 2 h: Symbol1 is sent • 3h: Symbol2 is sent Table 156. FrameCon bits...continued 9.12 Receiver configuration registers 9.12.1 RxSofD Bit 7 6 5 4 3 2 1 0 Symbol RFU SOF_En SOFDetected RFU SubC_En SubC_Detected SubC_Present Access rights - r/w dy - r/w dy r Table 157. RxSofD register (address 34h) Bit Symbol Description 7 to 6 RFU - 5 SOF_En If set and a SOF is detected an RxSOFIRQ is raised. 4 SOF_Detected Shows that a SOF is or was detected. Can be cleared by SW. 3 RFU - 2 SubC_En If set and a subcarrier is detected an RxSOFIRQ is raised. 1 SubC_Detected Shows that a subcarrier is or was detected. Can be cleared by SW. 0 SubC_Present Shows that a subcarrier is currently detected. Table 158. RxSofD bits 9.12.2 RxCtrl Bit 7 6 5 4 3 2 1 0 Symbol RxAllowBits RxMultiple RxEOFType EGT_Check EMD_Sup Baudrate Access rights r/w r/w r/w r/w r/w r/w Table 159. RxCtrl register (address 35h) Bit Symbol Description 7 RxAllowBits If set, data is written into FIFO even if CRC is enabled, and no complete byte has been received. Table 160. RxCtrl bits CLRC663 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 5.3 — 3 January 2024 90 / 177 |
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