PM3350-SW datasheet(53/224 Pages) PMC

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ELAN 8X10

PM3350 ELAN 8 X10

DATA SHEET

PMC-970109

ISSUE 3

8 PORT ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY

The PCI slave interface logic within the expansion port block responds to transfer

requests from external bus masters, performing the necessary accesses and

transferring the requested data. The slave interface logic acts as a responder during

frame transfers between devices belonging to the ELAN chipset, supplying Ethernet

frame data to requesters as necessary. An external processor can also use the PCI

slave interface to gain access to internal device registers and data structures in the

local memory space, or to download firmware or data to the ELAN 8x10 Switch

Processor. The slave interface unit contains a 32-byte write FIFO and a 128-byte read

FIFO to improve burst behavior during PCI reads and writes: the write FIFO buffers

data being written to the ELAN 8x10 by external devices, while the read FIFO holds

data read from local memory or internal registers in response to PCI memory read

commands from external requesters. Note that the slave interface only responds to

configuration space and memory space reads and writes; I/O space reads and writes

are not supported. The slave interface conforms to the access latency, access ordering

and disconnect rules of the PCI v2.1 standard. A set of special registers are provided in

the PCI configuration space that may be used to alter the access latency rules imposed

by the slave logic in order to improve PCI bus utilization if required.

The expansion port also contains hardware to speed up intercommunication between

ELAN 8x10 devices via the PCI bus. This hardware takes the form of seven request

counters and seven acknowledge counters. Each request/ acknowledge counter pair is

dedicated to supporting communications with a specific external ELAN 8x10 device. An

external ELAN 8x10 device will increment a request counter to signal that a packet or

message data is available to be read, and will increment an acknowledge counter to

acknowledge that it (the external ELAN 8x10) has read a message or packet from the

local ELAN 8x10. Standard PCI reads and writes can be used to increment the request

and acknowledge counters. More details on these counters are supplied below.

The expansion port is compatible with the "PCI Local Bus Specification", release 2.1.

To support the use of the ELAN 8x10 in standalone switch system applications, a

simple external bus arbiter (easily implemented in a single programmable logic device)

must be provided to arbitrate between PCI bus accesses of multiple ELAN 8x10

devices.

The PCI bus interface within the expansion port runs synchronously to the PCI bus

clock, which must be supplied on the PCI_CLK input pin. The duty cycle of the

PCI_CLK pin is as specified in the PCI Local Bus Specification whereas the operating

frequency used by the ELAN expansion bus interface is 40 MHz, as opposed to the PCI

Local Bus Specification value of 33 MHz. The ELAN 8x10 PCI bus interface implements

synchronization logic to transfer data between the PCI bus clock domain and the

internal device clock.

PCI Transactions Supported

The on-chip PCI interface is capable of initiating the following commands:

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