PIC16F18323-ESLASHRFQTP datasheet(125/442 Pages) MICROCHIP

125 / 442 page

 2015 Microchip Technology Inc.

Preliminary

DS40001799A-page 125

PIC16(L)F18313/18323

NVMCON2: NONVOLATILE MEMORY CONTROL 2 REGISTER

W-0/0

NVMCON2<7:0>

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

S = Bit can only be set

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

bit 7-0

NVMCON2<7:0>:

Flash Memory Unlock Pattern bits

To unlock writes, a 55h must be written first, followed by an AAh, before setting the WR bit of the

NVMCON1 register. The value written to this register is used to unlock the writes.

TABLE 10-5:

SUMMARY OF REGISTERS ASSOCIATED WITH NONVOLATILE MEMORY (NVM)

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

on Page

INTCON

GIE

PEIE

—

INTEDG

PIR2

—

C2IF(1)

C1IF

NVMIF

—

NCO1IF

PIE2

—

C2IE(1)

C1IE

NVMIE

—

NCO1IE

NVMCON1

—

NVMREGS

LWLO

FREE

WRERR

WREN

124

NVMCON2

NVMCON2<7:0>

125

NVMADRL

NVMADR<7:0>

123

NVMADRH

—(2)

NVMADR<14:8>

123

NVMDATL

NVMDAT<7:0>

123

NVMDATH

—

NVMDAT<13:8>

123

Legend:

—

= unimplemented location, read as ‘0’. Shaded cells are not used by NVM.

Note

PIC16(L)F18323 only.

Unimplemented, read as ‘1’.

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