STM32WBA62CGF6 datasheet(137/185 Pages) STMICROELECTRONICS

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DS14736 Rev 1

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STM32WBA6xxx

Electrical characteristics

169

The test results are given in Table 70. They are based on the EMS levels and classes

defined in AN1709 “EMC design guide for STM8, STM32 and legacy MCUs”.

Designing hardened software to avoid noise problems

EMC characterization and optimization are performed at component level with a typical

application environment and simplified MCU software.

Good EMC performance is highly dependent on the user application, and the software in

particular. Therefore, it is recommended that the user applies EMC software optimization

and prequalification tests in relation with the requested EMC level.

Software recommendations

The software flow must include the management of runaway conditions, such as:

•

Corrupted program counter

•

Unexpected reset

•

Critical data corruption (control registers)

Prequalification trials

Most of the common failures (unexpected reset and program counter corruption) can be

reproduced by manually forcing a low state on the NRST pin or on the oscillator pins for

1 second.

To complete these trials, ESD stress can be applied directly on the device, over the range of

specified values. When an unexpected behavior is detected, the software can be hardened

to prevent the occurrence of unrecoverable errors. See AN1015 “Software techniques for

improving microcontrollers EMC performance” for more details.

Electromagnetic interference (EMI)

The electromagnetic field emitted by the device is monitored while a simple application is

executed (toggling two LEDs through the I/O ports). This emission test is compliant with the

IEC 61967-2 standard, which specifies the test board and the pin loading.

Table 70. EMS characteristics(1)

Symbol

Parameter

Conditions

Level/Class

VFESD

Voltage limits to apply on any I/O pin to

induce a functional disturbance

VDD = 3.3 V, TA = +25 °C, fHCLK1 = 100 MHz,

UFQFPN48 conforming to IEC 61000-4-2

VEFTB

Fast transient voltage burst limits to apply

through 100 pF on VDD and VSS pins to

induce a functional disturbance

VDD = 3.3 V, TA = +25 °C, fHCLK1 = 100 MHz,

UFQFPN48 conforming to IEC 61000-4-4

1. Evaluated by characterization, not tested in production, unless otherwise specified.

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