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7643 Datasheet(PDF) 398 Page - Renesas Technology Corp |
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7643 Datasheet(HTML) 398 Page - Renesas Technology Corp |
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398 / 424 page ![]() 7643 Group REJ09B0133-0200 APPENDIX 3.5 Control registers Rev.2.00 Aug 28, 2006 page 75 of 98 USB endpoint x OUT write count register b7 b6 b5 b4 b3 b2 b1 b0 USB endpoint x (x=0 to 2) OUT write count register (WRT_CNT : address 5D16) b 0 1 2 4 Name 0 Functions At reset R W 0 0 0 0 5 0 6 7 0 0 3 Contains the number of bytes in endpoint x OUT FIFO. ✕ ✕ ✕ ✕ ✕ ✕ ✕ ✕ USB endpoint FIFO mode register b7 b6 b5 b4 b3 b2 b1 b0 USB endpoint FIFO mode register (USBFIFOMR : address 5F16) b 0 1 2 Name 0 Functions At reset R W 0 0 0 For endpoint 1 b3b2b1b0 ✕ 0 0 0 : IN 128-byte, OUT 128-byte For endpoint 2 b3b2b1b0 0 ✕ ✕ ✕ : IN 32-byte, OUT 32-byte 1 ✕ ✕ ✕ : IN 128-byte, OUT 128-byte FIFO size selection bit (Note) 0 0 0 0 3 4 5 6 7 Note: The value set into “x” is invalid. Nothing is arranged for these bits. When these bits are read out, the contents are undefined. These bits are “0” at write. Fig. 3.5.47 Structure of USB endpoint x OUT write control register (x = 0 to 2) Fig. 3.5.48 Structure of USB endpoint FIFO mode register |
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