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SPMCK16Z4MPV16 Datasheet(PDF) 240 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV16 Datasheet(HTML) 240 Page - Freescale Semiconductor, Inc |
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240 / 500 page ![]() QUEUED SERIAL MODULE M68HC16 Z SERIES 9-30 USER’S MANUAL A receiver is placed in wake-up mode by setting the RWU bit in SCCR1. While RWU is set, receiver status flags and interrupts are disabled. Although the CPU16 can clear RWU, it is normally cleared by hardware during wake-up. The WAKE bit in SCCR1 determines which type of wake-up is used. When WAKE = 0, idle-line wake-up is selected. When WAKE = 1, address-mark wake-up is selected. Both types require a software-based device addressing and recognition scheme. Idle-line wake-up allows a receiver to sleep until an idle line is detected. When an idle- line is detected, the receiver clears RWU and wakes up. The receiver waits for the first frame of the next transmission. The byte is received normally, transferred to RDR, and the RDRF flag is set. If software does not recognize the address, it can set RWU and put the receiver back to sleep. For idle-line wake-up to work, there must be a minimum of one frame of idle line between transmissions. There must be no idle time between frames within a transmission. Address-mark wake-up uses a special frame format to wake up the receiver. When the MSB of an address-mark frame is set, that frame contains address information. The first frame of each transmission must be an address frame. When the MSB of a frame is set, the receiver clears RWU and wakes up. The byte is received normally, trans- ferred to the RDR, and the RDRF flag is set. If software does not recognize the ad- dress, it can set RWU and put the receiver back to sleep. Address-mark wake-up allows idle time between frames and eliminates idle time between transmissions. How- ever, there is a loss of efficiency because of an additional bit-time per frame. 9.4.3.9 Internal Loop Mode The LOOPS bit in SCCR1 controls a feedback path in the data serial shifter. When LOOPS is set, the SCI transmitter output is fed back into the receive serial shifter. TXD is asserted (idle line). Both transmitter and receiver must be enabled before entering loop mode. Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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