SPMCK16Z4MPV16 datasheet(170/500 Pages) FREESCALE

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SYSTEM INTEGRATION MODULE

M68HC16 Z SERIES

5-64

USER’S MANUAL

Blocks of addresses are assigned to each chip-select function. Block sizes of 2 Kbytes

to 1 Mbyte can be selected by writing values to the appropriate base address register

(CSBAR[10:0] and CSBARBT). However, because the logic state of ADDR20 is al-

ways the same as the state of ADDR19 in the MCU, the largest usable block size is

512 Kbytes. Multiple chip-selects assigned to the same block of addresses must have

the same number of wait states.

Chip-select option registers (CSORBT and CSOR[0:10]) determine timing of and con-

ditions for assertion of chip-select signals. Eight parameters, including operating

mode, access size, synchronization, and wait state insertion can be specified.

Initialization software usually resides in a peripheral memory device controlled by the

chip-select circuits. A set of special chip-select functions and registers (CSORBT and

CSBARBT) is provided to support bootstrap operation.

Comprehensive address maps and register diagrams are provided in APPENDIX D

5.9.1.1 Chip-Select Pin Assignment Registers

The pin assignment registers contain twelve 2-bit fields that determine the functions of

the chip-select pins. Each pin has two or three possible functions, as shown in Table

5-22.

Table 5-23 shows pin assignment field encoding. Pins that have no discrete output

function must not use the %00 encoding as this will cause the alternate function to be

selected. For instance, %00 for CS0/BR will cause the pin to perform the BR function.

Table 5-22 Chip-Select Pin Functions

Chip-Select

Alternate

Function

Discrete

Output

CSBOOT

—

CS0

—

CS1

—

CS2

BGACK

—

CS3

FC0

PC0

CS4

FC1

PC1

CS5

FC2

PC2

CS6

ADDR19

PC3

CS7

ADDR20

PC4

CS8

ADDR21

PC5

CS9

ADDR22

PC6

CS10

ADDR23

ECLK

Table 5-23 Pin Assignment Field Encoding

CSxPA[1:0]

Description

Discrete output

Alternate function

Chip-select (8-bit port)

Chip-select (16-bit port)

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