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OR3LP26B Datasheet(PDF) 144 Page - Agere Systems |
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OR3LP26B Datasheet(HTML) 144 Page - Agere Systems |
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144 / 184 page ![]() ORCA OR3LP26B FPSC Data Sheet Embedded Master/Target PCI Interface March 2000 144 Lucent Technologies Inc. Lucent Technologies Inc. Timing Characteristics (continued) Table 60. OR3LP26B FPGA to PCI, and PCI to FPGA, Combinatorial Path Delays OR3LP26B Commercial: VDD = 3.0 V to 3.6 V, 0 °C < TA < 70 °C; VDD2 = 2.38 V to 2.63 V, 0 °C < TA < 70 °C. Notes: The FPGA to PCI combinatorial path delays include the ASIC path delay and the output buffer delay under a 10 pF load. They do not include the interbuf delay on the FPGA side. The PCI to FPGA combinatorial path delays include the ASIC input buffer delay, and ASIC path delay entering the FPGA. They do not include the interbuf delay on the FPGA side. Table 61. OR3LP26B FPGA Side Interface Combinatorial Path Delay Signals OR3LP26B Commercial: VDD = 3.0 V to 3.6 V, 0 °C < TA < 70 °C; VDD2 = 2.38 V to 2.63 V, 0 °C < TA < 70 °C. Note: The combinatorial path parameters are measured from the input to the output (both on the FPGA side), excluding the interbufs, which traverse the ASIC/FPGA boundary. The ORCA Foundry Static Analysis Tool, Trace, accounts for clock skew and interbuf delays on the clock and data paths. Description (TI = 85 °C, VDD = min, VDD2 = min) Min Max Unit Source Destination pci_intan (FPGA side) intan (PCI side) — 4.094 ns clk (PCI side) pciclk (FPGA side) — 3.226 ns rstn (PCI side) pci_rstn (FPGA side) — 1.622 ns Description (TI = 85 °C, VDD = min, VDD2 = min) Min Max Unit Source Destination fifo_sel datatofpga[63:0] — 3.253 ns fifo_sel datatofpgax[7:0] — 2.652 ns twdataenn twlastcycn — 5.220 ns twdataenn datatofpga[63:0] (dual- port mode) — 6.114 ns twdataenn datatofpgax[7:0] (dual- port mode) — 5.847 ns twdataenn twdata[35:0] (quad-port mode) — 6.114 ns trdataenn trlastcycn — 5.558 ns mrdataenn mrlastcycn — 5.237 ns taenn twlastcycn — 5.406 ns taenn tstatecntr[2:0] — 4.767 ns taenn datatofpga[63:0] (dual- port mode) — 5.944 ns taenn datatofpgax[7:0] (dual- port mode) — 5.763 ns taenn twdata[35:0] (quad-port mode) — 5.944 ns taenn treqn — 4.958 ns maenn mstatecntr[2:0] — 5.860 ns mcmd mstatecntr[2:0] — 5.662 ns tcfgshiftenn pci_tdfg_stat — 4.227 ns mcfgshiftenn pci_mdfg_stat — 5.300 ns |
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