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HT85F2270 Datasheet(PDF) 141 Page - Holtek Semiconductor Inc |
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HT85F2270 Datasheet(HTML) 141 Page - Holtek Semiconductor Inc |
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141 / 226 page ![]() Rev. 1.00 141 of ��6 �a� 1�� �01� Standard 8051 8-Bit Flash MCU HT85F2260/HT85F2270/HT85F2280 Timer 2 Timer 2 is a 16-bit wide count-up counter which is driven by a user selectable internal or external clock source. The counter is composed of two registers, TL2 and TH2, to implement the Timer, event counter and gated timer functions. The clock source is decided by the bits T2I1 and T2I0 in the T2CON register. Timer function To select this function, bits T2I1 and T2I0 in the T2CON register, should be set to “01” respectively. The value in the Timer 2 registers, TL2 and TH2, increases by one each time an internal clock pulse is received. The count rate is derived from the “fSYS”. The prescaler can be managed by the T2PRE1 and T2PRE0 bits in the TMPRE register. When the timer counter is overflowed, an interrupt will take place and the interrupt request flag, TF2, will be set to high. Event Counter function To select this function, bits T2I1 and T2I0 in the T2CON register, should be set to “10” respectively. The value in the Timer 2 registers, TL2 and TH2, increases by one each time a falling edge occurs on the external timer pin, T2. When the timer counter is overflowed, an interrupt will take place and the interrupt request flag, TF2, will be set to high. The maximum count rate is 1/4 of the system clock frequency. Gated Timer function To select this function, bits T2I1 and T2I0 in the T2CON register, should be set to “11” respectively. The value in the Timer 2 registers, TL2 and TH2, increases by one each time an internal clock pulse is received. The count rate is derived from the “fSYS” and the prescaler can be managed by the T2PRE1 and T2PRE0 bits in the TMPRE register. The external timer pin, T2, can be a gate to the Timer 2 input. When the T2 pin is set high, the Timer 2 keeps counting and when the Timer 2 is cleared to low, the Timer 2 will be stopped. The T2 input signal will be sampled once by every internal system clock. When the timer counter is overflowed, an interrupt will take place and the interrupt request flag, TF2, will be set to high. |
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