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WM1811A Datasheet(PDF) 43 Page - Wolfson Microelectronics plc |
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WM1811A Datasheet(HTML) 43 Page - Wolfson Microelectronics plc |
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43 / 328 page ![]() Production Data WM1811A w PD, November 2013, Rev 4.1 43 The line input and voice CODEC input configurations are illustrated in Figure 11 through to Figure 14. Figure 11 IN1LN or IN1RN as Line Inputs Figure 12 IN2LN or IN2RN as Line Inputs Figure 13 IN1LP or IN1RP as Line Inputs Figure 14 IN2LP or IN2RP as Line Inputs INPUT PGA ENABLE The Input PGAs are enabled using register bits IN1L_ENA, IN2L_ENA, IN1R_ENA and IN2R_ENA, as described in Table 2. The Input PGAs must be enabled for microphone input on the respective input pins, or for line input on the inverting input pins IN1LN, IN1RN, IN2LN, IN2RN. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R2 (0002h) Power Management (2) 7 IN2L_ENA 0 IN2L Input PGA Enable 0 = Disabled 1 = Enabled 6 IN1L_ENA 0 IN1L Input PGA Enable 0 = Disabled 1 = Enabled 5 IN2R_ENA 0 IN2R Input PGA Enable 0 = Disabled 1 = Enabled 4 IN1R_ENA 0 IN1R Input PGA Enable 0 = Disabled 1 = Enabled Table 2 Input PGA Enable For normal operation of the input PGAs, the reference voltage VMID and the bias current must also be enabled. See “Reference Voltages and Master Bias” for details of the associated controls VMID_SEL and BIAS_ENA. |
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