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WM1811A Datasheet(PDF) 32 Page - Wolfson Microelectronics plc |
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WM1811A Datasheet(HTML) 32 Page - Wolfson Microelectronics plc |
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32 / 328 page  WM1811A Production Data w PD, November 2013, Rev 4.1 32 AUDIO INTERFACE TIMING DIGITAL MICROPHONE (DMIC) INTERFACE TIMING Figure 2 Digital Microphone Interface Timing Test Conditions The following timing information is valid across the full range of recommended operating conditions. PARAMETER SYMBOL MIN TYP MAX UNIT Digital Microphone Interface Timing DMICCLK cycle time tCY 320 ns DMICCLK duty cycle 45:55 55:45 DMICDAT (Left) setup time to falling DMICCLK edge tLSU 15 ns DMICDAT (Left) hold time from falling DMICCLK edge tLH 0 ns DMICDAT (Right) setup time to rising DMICCLK edge tRSU 15 ns DMICDAT (Right) hold time from rising DMICCLK edge tRH 0 ns |
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