AT89LP51RB2 datasheet(65/254 Pages) ATMEL

65 / 254 page

3722A–MICRO–10/11

AT89LP51RB2/RC2/IC2 Preliminary

Table 9-7.

IPH0 – Interrupt Priority High Register 0

IPH0 = B7H

Reset Value = 0000 0000B

Not Bit Addressable

IP1DIS

PPCH

PT2H

PSH

PT1H

PX1H

PT0H

PX0H

Bit

543

Symbol

Function

IP1DIS

Interrupt Level 1 Disable

Clear to enable all interrupts with priority level 1. Set to disable all interrupts with priority level 1.

PPCH

PCA Interrupt Priority High

High order bit for PCA interrupt priority level.

PT2H

Timer 2 Interrupt Priority High

High order bit for Timer 2 interrupt priority level.

PSH

Serial Port Interrupt Priority High

High order bit for UART interrupt priority level.

PT1H

Timer 1 Interrupt Priority High

High order bit for Timer 1 interrupt priority level.

PX1H

External Interrupt 1 Priority High

High order bit for INT1 interrupt priority level.

PT0H

Timer 0 Interrupt Priority High

High order bit for Timer 0 interrupt priority level.

PX0H

External Interrupt 0 Priority High

High order bit for INT0 interrupt priority level.

Table 9-8.

IPH1 – Interrupt Priority High Register 1

IPH1 = B3H

Reset Value = 0000 0000B

Not Bit Addressable

IP3DIS

–

PADCH

PCMPH

–

PSPH

PTWH

PKBH

Bit

543

Symbol

Function

IP3DIS

Interrupt Level 3 Disable

Clear to enable all interrupts with priority level 3. Set to disable all interrupts with priority level 3.

PADCH

ADC Interrupt Priority High

High order bit for ADC interrupt priority level.

PCMPH

Analog Comparator Interrupt Priority High

High order bit for Analog Comparator interrupt priority level.

PSPH

SPI Interrupt Priority High

High order bit for SPI interrupt priority level.

PTWH

TWI Interrupt Priority High

High order bit for TWI interrupt priority level.

PKBH

Keyboard Interrupt Priority High

High order bit for Keyboard interrupt priority level.

AT89LP51RB2 Datasheet(PDF) 65 Page - ATMEL Corporation

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