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AT89LP51RB2 Datasheet(PDF) 22 Page - ATMEL Corporation |
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AT89LP51RB2 Datasheet(HTML) 22 Page - ATMEL Corporation |
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22 / 254 page  22 3722A–MICRO–10/11 AT89LP51RB2/RC2/IC2 Preliminary Figure 3-15. MOVX with Three Wait States (WS =11B) 3.4 Extra RAM (EDATA) The Extra RAM is a portion of the external memory space implemented as an internal 2K byte auxiliary RAM. The Extra RAM is mapped into the EDATA space at the bottom of the external memory address space, from 0000H to 07FFH, when EXTRAM = 0 (AUXR.1). The size of EDATA can be reduced by the XRS bits in AUXR (See Table 3-2). MOVX instructions to this address range will access the internal Extra RAM. EDATA can be accessed with both 16-bit (MOVX @DPTR) and 8-bit (MOVX @Ri) addresses. When 8-bit addresses are used, the PAGE register (0F6H) supplies the upper address bits. The PAGE register breaks EDATA into eight 256-byte pages. A page cannot be specified independently for MOVX @R0 and MOVX @R1. Setting PAGE above 07H enables XDATA access, but does not change the value of Port 2. When 16-bit addresses are used (DPTR), the EEE bit (EECON.1) must also be zero to access EDATA. MOVX instructions to EDATA require a minimum of 2 clock cycles. S1 S2 S3 W1 CLK ALE WR DPL OUT P0 SFR P0 SFR P0 P2 SFR P2 SFR DPH or P2 OUT P2 DATA OUT W2 RD DPL OUT P0 SFR P0 SFR P0 FLOAT W3 S4 Table 3-3. PAGE – EDATA Page Register PAGE = F6H Reset Value = 0000 0000B Not Bit Addressable — — — — PAGE.3 PAGE.2 PAGE.1 PAGE.0 Bit 7 6 543 21 0 Symbol Function PAGE 7-0 Selects which 256-byte page of EDATA is currently accessible by MOVX @Ri instructions when PAGE < 08H. Any PAGE value between 08H and FFH will selected XDATA; however, this value will not be output on P2. |
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