AN2208 datasheet(10/51 Pages) STMICROELECTRONICS

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2 VN808 reference design board

AN2208

10/51

environmental noise. Figure 5 shows a surge suppression block using a uni-directional

SM15T36A Transil diode.

The Transil diode provides overvoltage protection for the HSD. The SM15T36A has a peak

pulse power dissipation of 1500 W, stand-off voltage of 36 V and breakdown voltage of 37.8 V.

Depending on the application, a Transil diode with a different value (for example, between 28 V

and 40 V) may be used.

An electrolytic capacitor (C1) must be placed immediately after the surge suppression block.

The size of the electrolytic capacitor is selected based on the slope of the output current, the

impedance of the complex power supply cables, as well as the maximum allowed voltage drop

across the device. The C1 value is generally 25 µF per chip. For more information about the C1

value, please refer to Application Note AN1351: VIPower and BCDMultipower: Making life

easier with ST's high-side drivers.

A low ESR SMD capacitor (C2) must be placed as close as possible to the HSD in order to filter

the power supply line for electromagnetic compatibility concerns. The suggested C2 value is

100 nF.

2.3

Isolation recommendations

Industrial environments require good isolation between digital and power supply parts.

Optocouplers are widely used and multi-channel optocouplers represent a very attractive

solution. Figure 6 shows a schematic diagram with optocouplers connected to ground.

Although optocouplers are good isolators, they may lower the category of the Electrical Fast

Transients (EFT) immunity tests as the primary and secondary sides of the optocouplers may

still have parasitic capacitance “bonding” to each other, even though they are isolated. This

parasitic capacitance may inject a current through the base emitter junction of the

phototransistor when one half of the optocoupler is “tight” due to fast voltage transients with

respect to the other side as shown in Figure 7.

If an optocoupler is used in an emitter-follower configuration, as in most industrial applications,

a high emitter voltage signal may be induced by applying EFTs even after opening the collector

termination. An efficient way to prevent this high emitter voltage signal is to provide a

conducting plane connected to ground on both the top and bottom layers of the PCB (under the

optocouplers) as shown in Figure 52: VN808 RDB PCB layout (top and bottom).

Figure 5.

Surge Suppression Block

C14

4.7 nF

Ai11615

24V DC Input

C13

4.7 nF

GND_EARTH

GND_POWER

22 µF

50V

100 nF

SM15T36A

VCC 24V

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