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PIC16C765/P Datasheet(PDF) 25 Page - Microchip Technology

Part # PIC16C765/P
Description  8-Bit CMOS Microcontrollers with USB
PDF  158 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

PIC16C765/P Datasheet(HTML) 25 Page - Microchip Technology

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© 1999 Microchip Technology Inc.
Advanced Information
DS41124A-page 25
PIC16C745/765
4.2.2.4
PIE1 REGISTER
This register contains the individual enable bits for the
peripheral interrupts.
REGISTER 4-4:
PERIPHERAL INTERRUPT ENABLE1 REGISTER (PIE1: 8Ch)
Note:
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
R/W-0
PSPIE(1)
ADIE
RCIE
TXIE
USBIE
CCP1IE
TMR2IE
TMR1IE
R
= Readable bit
W = Writable bit
U
= Unimplemented bit,
read as ‘0’
-n = Value at POR reset
bit7
bit0
bit 7:
PSPIE(1): Parallel Slave Port Read/Write Interrupt Enable bit
1
= Enables the PSP read/write interrupt
0
= Disables the PSP read/write interrupt
bit 6:
ADIE: A/D Converter Interrupt Enable bit
1
= Enables the A/D interrupt
0
= Disables the A/D interrupt
bit 5:
RCIE: USART Receive Interrupt Enable bit
1
= Enables the USART receive interrupt
0
= Disables the USART receive interrupt
bit 4:
TXIE: USART Transmit Interrupt Enable bit
1
= Enables the USART transmit interrupt
0
= Disables the USART transmit interrupt
bit 3:
USBIE: Universal Serial Bus Interrupt Enable bit
1
= Enables the USB interrupt
0
= Disables the USB interrupt
bit 2:
CCP1IE: CCP1 Interrupt Enable bit
1
= Enables the CCP1 interrupt
0
= Disables the CCP1 interrupt
bit 1:
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1
= Enables the TMR2 to PR2 match interrupt
0
= Disables the TMR2 to PR2 match interrupt
bit 0:
TMR1IE: TMR1 Overflow Interrupt Enable bit
1
= Enables the TMR1 overflow interrupt
0
= Disables the TMR1 overflow interrupt
Note 1: PIC16C745 device does not have a parallel slave port implemented; always maintain this bit clear.



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