PIC16C765SLASHP datasheet(53/158 Pages) MICROCHIP

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Advanced Information

DS41124A-page 53

PIC16C745/765

9.1

Capture Mode

In Capture mode, CCPR1H:CCPR1L captures the

16-bit value of the TMR1 register when an event occurs

on pin RC2/CCP1. An event is defined as:

• Every falling edge

• Every rising edge

• Every 4th rising edge

• Every 16th rising edge

An event is selected by control bits CCP1M<3:0>

(CCP1CON<3:0>). When a capture is made, the inter-

rupt request flag bit CCP1IF (PIR1<2>) is set. The

interrupt flag must be cleared in software. If another

capture occurs before the value in register CCPR1 is

read, the old captured value will be lost.

9.1.1

CCP PIN CONFIGURATION

In Capture mode, the RC2/CCP1 pin should be config-

ured as an input by setting the TRISC<2> bit.

FIGURE 9-1:

CAPTURE MODE OPERATION

BLOCK DIAGRAM

9.1.2

TIMER1 MODE SELECTION

Timer1 must be running in timer mode or synchronized

counter mode for the CCP module to use the capture

feature. In asynchronous counter mode, the capture

operation may not work.

9.1.3

SOFTWARE INTERRUPT

When the capture mode is changed, a false capture

interrupt may be generated. The user should keep bit

CCP1IE (PIE1<2>) clear to avoid false interrupts and

should clear the flag bit CCP1IF following any such

change in operating mode.

9.1.4

CCP PRESCALER

There are four prescaler settings, specified by bits

CCP1M<3:0>. Whenever the CCP module is turned off,

or the CCP module is not in capture mode, the pres-

caler counter is cleared. Any reset will clear the pres-

caler counter.

Switching from one capture prescaler to another may

generate an interrupt. Also, the prescaler counter will

not be cleared, therefore, the first capture may be from

a non-zero prescaler. Example 9-1 shows the recom-

mended method for switching between capture pres-

calers. This example also clears the prescaler counter

and will not generate the “false” interrupt.

EXAMPLE 9-1:

CHANGING BETWEEN

CAPTURE PRESCALERS

CLRF

CCP1CON

;Turn CCP module off

MOVLW

NEW_CAPT_PS

;Load the W reg with

; the new precscaler

; move value and CCP ON

MOVWF

CCP1CON

;Load CCP1CON with this

; value

Note:

If the RC2/CCP1 pin is configured as an

output, a write to the port can cause a cap-

ture condition.

CCPR1H

CCPR1L

TMR1H

TMR1L

Set flag bit CCP1IF

(PIR1<2>)

Capture

Enable

Q’s

CCP1CON<3:0>

RC2/CCP1

Prescaler

÷ 1, 4, 16

and

edge detect

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