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PIC16C765/P Datasheet(PDF) 56 Page - Microchip Technology |
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PIC16C765/P Datasheet(HTML) 56 Page - Microchip Technology |
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56 / 158 page  PIC16C745/765 DS41124A-page 56 Advanced Information © 1999 Microchip Technology Inc. TABLE 9-3: REGISTERS ASSOCIATED WITH CAPTURE, COMPARE, AND TIMER1 TABLE 9-4: REGISTERS ASSOCIATED WITH PWM AND TIMER2 Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other resets 0Bh,8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF(1) ADIF RCIF TXIF USBIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 0Dh PIR2 — — — — — — —CCP2IF ---- ---0 ---- ---0 8Ch PIE1 PSPIE(1) ADIE RCIE TXIE USBIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 8Dh PIE2 — — — — — — —CCP2IE ---- ---0 ---- ---0 87h TRISC PORTC Data Direction Register 1111 1111 1111 1111 0Eh TMR1L Holding register for the Least Significant Byte of the 16-bit TMR1 register xxxx xxxx uuuu uuuu 0Fh TMR1H Holding register for the Most Significant Byte of the 16-bit TMR1 register xxxx xxxx uuuu uuuu 10h T1CON — — T1CKPS1 T1CKPS0 T1OSCEN T1SYNC TMR1CS TMR1ON --00 0000 --uu uuuu 15h CCPR1L Capture/Compare/PWM register1 (LSB) xxxx xxxx uuuu uuuu 16h CCPR1H Capture/Compare/PWM register1 (MSB) xxxx xxxx uuuu uuuu 17h CCP1CON — — DCnB1 DCnB0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 1Bh CCPR2L Capture/Compare/PWM register2 (LSB) xxxx xxxx uuuu uuuu 1Ch CCPR2H Capture/Compare/PWM register2 (MSB) xxxx xxxx uuuu uuuu 1Dh CCP2CON — — DCnB1 DCnB0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000 Legend: x = unknown, u = unchanged, - = unimplemented read as ’0’. Shaded cells are not used by Capture and Timer1. Note 1: The PSP is not implemented on the PIC16C745; always maintain these bits clear. Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Value on: POR, BOR Value on all other resets 0Bh,8Bh, 10Bh,18Bh INTCON GIE PEIE T0IE INTE RBIE T0IF INTF RBIF 0000 000x 0000 000u 0Ch PIR1 PSPIF(1) ADIF RCIF TXIF USBIF CCP1IF TMR2IF TMR1IF 0000 0000 0000 0000 0Dh PIR2 — — — — — — — CCP2IF ---- ---0 ---- ---0 8Ch PIE1 PSPIE(1) ADIE RCIE TXIE USBIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000 8Dh PIE2 — — — — — — — CCP2IE ---- ---0 ---- ---0 87h TRISC PORTC Data Direction Register 1111 1111 1111 1111 11h TMR2 Timer2 module’s register 0000 0000 0000 0000 92h PR2 Timer2 module’s period register 1111 1111 1111 1111 12h T2CON — TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0 -000 0000 -000 0000 15h CCPR1L Capture/Compare/PWM register1 (LSB) xxxx xxxx uuuu uuuu 16h CCPR1H Capture/Compare/PWM register1 (MSB) xxxx xxxx uuuu uuuu 17h CCP1CON — — DCnB1 DCnB0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 --00 0000 --00 0000 1Bh CCPR2L Capture/Compare/PWM register2 (LSB) xxxx xxxx uuuu uuuu 1Ch CCPR2H Capture/Compare/PWM register2 (MSB) xxxx xxxx uuuu uuuu 1Dh CCP2CON — — DCnB1 DCnB0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 --00 0000 --00 0000 Legend: x = unknown, u = unchanged, - = unimplemented read as '0'. Shaded cells are not used by PWM and Timer2. Note 1: Bits PSPIE and PSPIF are reserved on the PIC16C745; always maintain these bits clear. |
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