PIC16C765SLASHP datasheet(26/158 Pages) MICROCHIP

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PIC16C745/765

DS41124A-page 26

Advanced Information

4.2.2.5

PIR1 REGISTER

This register contains the individual flag bits for the

peripheral interrupts.

PERIPHERAL INTERRUPT REGISTER1 (PIR1: 0Ch)

Note:

Interrupt flag bits are set when an interrupt

condition occurs, regardless of the state of

its corresponding enable bit or the global

enable bit, GIE (INTCON<7>). User soft-

ware should ensure the appropriate inter-

rupt flag bits are clear prior to enabling an

interrupt.

R/W-0

R-0

R/W-0

PSPIF(1)

ADIF

RCIF

TXIF

USBIF

CCP1IF

TMR2IF

TMR1IF

= Readable bit

W = Writable bit

= Unimplemented bit,

read as ‘0’

-n = Value at POR reset

bit7

bit0

bit 7:

PSPIF(1): Parallel Slave Port Read/Write Interrupt Flag bit

= A read or a write operation has taken place (must be cleared in software)

= No read or write has occurred

bit 6:

ADIF: A/D Converter Interrupt Flag bit

= An A/D conversion completed (must be cleared in software)

= The A/D conversion is not complete

bit 5:

RCIF: USART Receive Interrupt Flag bit

= The USART receive buffer is full (clear by reading RCREG)

= The USART receive buffer is empty

bit 4:

TXIF: USART Transmit Interrupt Flag bit

= The USART transmit buffer is empty (clear by writing to TXREG)

= The USART transmit buffer is full

bit 3:

USBIF: Universal Serial Bus (USB) Interrupt Flag

= A USB interrupt condition has occurred. The specific cause can be found by examining the contents

of the UIR and UIE registers.

= No USB interrupt conditions that are enabled have occurred.

bit 2:

CCP1IF: CCP1 Interrupt Flag bit

Capture Mode

= A TMR1 register capture occurred (must be cleared in software)

= No TMR1 register capture occurred

Compare Mode

= A TMR1 register compare match occurred (must be cleared in software)

= No TMR1 register compare match occurred

PWM Mode

Unused in this mode

bit 1:

TMR2IF: TMR2 to PR2 Match Interrupt Flag bit

= TMR2 to PR2 match occurred (must be cleared in software)

= No TMR2 to PR2 match occurred

bit 0:

TMR1IF: TMR1 Overflow Interrupt Flag bit

= TMR1 register overflowed (must be cleared in software)

= TMR1 register did not overflow

Note 1: PIC16C745 device does not have a parallel slave port implemented. This bit location is reserved on this

device. Always maintain this bit clear.

PIC16C765/P Datasheet(PDF) 26 Page - Microchip Technology

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