PIC16C765SLASHP datasheet(132/158 Pages) MICROCHIP

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PIC16C745/765

DS41124A-page 132

Advanced Information

FIGURE 16-5: CLKOUT AND I/O TIMING

TABLE 16-3:

CLKOUT AND I/O TIMING REQUIREMENTS

Param

No.

Sym

Characteristic

Min

Typ†

Max

Units

Conditions

10*

TOSH2CKLOSC1

↑ to CLKOUT↓

—

200

Note 1

11*

TOSH2CKHOSC1

↑ to CLKOUT↑

—

200

Note 1

12*

TCKR

CLKOUT rise time

—

100

Note 1

13*

TCKF

CLKOUT fall time

—

100

Note 1

14*

TCKL2IOVCLKOUT

↓ to Port out valid

—

0.5 TCY + 20

Note 1

15*

TIOV2CKH

Port in valid before CLKOUT

↑

TOSC + 200

—

Note 1

16*

TCKH2IOI

Port in hold after CLKOUT

↑

—

Note 1

17*

TOSH2IOVOSC1

↑ (Q1 cycle) to Port out valid

—

150

18*

TOSH2IOIOSC1

↑ (Q2 cycle) to Port input invalid (I/O in hold

time)

100

—

18A*

200

—

19*

TIOV2OSH

Port input valid to OSC1

↑ (I/O in setup time)

—

20*

TIOR

Port output rise time

—

20A*

—

21*

TIOF

Port output fall time

—

21A*

—

22††*

TINP

INT pin high or low time

TCY

——

23††*

TRBP

RB<7:4> change INT high or low time

TCY

——

* These parameters are characterized but not tested.

†Data in “Typ” column is at 5V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.

††These parameters are asynchronous events not related to any internal clock edge.

Note 1: Measurements are taken in EC Mode where CLKOUT output is 4 x TOSC.

2: FINT = OSC1 when PLL

Note: Refer to Figure 16-2 for load conditions.

FINT

CLKOUT

I/O Pin

(input)

I/O Pin

(output)

20, 21

old value

new value

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