CC1100-RTY1 datasheet(55/100 Pages) TI1

55 / 100 page

CC1100

SWRS038D

Page 55 of 92

Figure 29: Left: Top Solder Resist Mask (Negative). Right: Top Paste Mask. Circles are Vias

General Purpose / Test Output Control Pins

The three digital output pins GDO0, GDO1,

and GDO2 are general control pins configured

with

IOCFG0.GDO0_CFG

IOCFG1.GDO1_CFG

, and IOCFG2.GDO3_CFG

respectively. Table 34 shows the different

signals that can be monitored on the GDO

pins. These signals can be used as inputs to

the MCU. GDO1 is the same pin as the SO pin

on the SPI interface, thus the output

programmed on this pin will only be valid when

CSn is high. The default value for GDO1 is 3-

stated, which is useful when the SPI interface

is shared with other devices.

The default value for GDO0 is a 135-141 kHz

clock output (XOSC frequency divided by

192). Since the XOSC is turned on at power-

on-reset, this can be used to clock the MCU in

systems with only one crystal. When the MCU

is up and running, it can change the clock

frequency by writing to IOCFG0.GDO0_CFG.

An on-chip analog temperature sensor is

enabled by writing the value 128 (0x80) to the

IOCFG0

pin is then proportional to temperature. See

Section 4.7 on page 16 for temperature sensor

specifications.

If the IOCFGx.GDOx_CFG setting is less than

0x20 and IOCFGx_GDOx_INV is 0 (1), the

GDO0 and GDO2 pins will be hardwired to 0

(1) and the GDO1 pin will be hardwired to 1

(0) in the SLEEP state. These signals will be

hardwired until the CHIP_RDYn signal goes

low.

If the IOCFGx.GDOx_CFG setting is 0x20 or

higher the GDO pins will work as programmed

also in SLEEP state. As an example, GDO1 is

high

impedance

all

states

IOCFG1.GDO1_CFG=0x2E

CC1100-RTY1 Datasheet(PDF) 55 Page - Texas Instruments

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