DP83953 datasheet(49/90 Pages) NSC

49 / 90 page

6.0 Port Block Functions (Continued)

www.national.com

6.4 Local Ports and Expected Activity

The RIC2A incorporates security options into the repeater.

The configuration of the security features can be performed

globally or on a per port basis. Upon packet reception by

the RIC2A, depending on port configuration, the repeater

will either: transmit the actual data intact to the port, or

transmit pseudo random data to the port during the data

field of the packet.

RIC2A security features can be globally enabled/disabled

during the MLOAD process, or via the RIC2A Configuration

set, the device will, for all ports, set the port SME (Security

Mode), ESA (Source Address Security), EDA (Destination

Address Security), LME (Learn Mode Enable) bits in the

Port Security Configuration Register (PSCR).

Learning Mode for all the port CAMs can be globally

enabled during the MLOAD process, or via the GLME (Glo-

bal Learn Mode Enable) bit in the Global Security Register

(GSR). When GLME is set, the device will, for all ports, set

the LME (Learn Mode Enable) bit in the PSCR register.

In a multi RIC2A repeater environment, each RIC2A will

get the packet intact over the InterRIC bus (except those

with mismatched source addresses when configured in the

security mode). Each RIC2A will transmit either the real,

intact data or pseudo random data depending on the port

configuration.

Configuration of the Source and Destination Ad-

dress Security Modes

1. Security Mode Disabled

RIC2A performs the same repeater operations as the

RIC. The received data is transmitted to all ports, and on

the InterRIC bus.

2. Security Mode Enabled

a. When a port's ESA =0 and,

i. The port's EDA=0, then the repeater will repeat the

data on the port, and the Inter-RIC bus.

ii. The port's EDA=1, then the repeater will repeat the

data on destination address match. On a destina-

tion address mismatch, the repeater will transmit

random data on that port. In both cases, the re-

peater will transmit data on the Inter-RIC bus.

b. When a port's ESA=1 and,

i. The port's EDA=0, then on a valid source address

match, the repeater will repeat the data on that

port, and on the Inter-RIC bus. If source address

mismatch occurs, then the repeater will transmit

random data to the port, and on the Inter-RIC bus.

ii. The port's EDA=1, then on a valid source and des-

tination address match, the repeater will repeat the

data on the port. If source address matches, but

the destination address does not match, then the

repeater will transmit random data to that port. In

both of these cases, the repeater will repeat the

data on the Inter-RIC bus. When source address

mismatch occurs, then the repeater will transmit

random data to the port and on the Inter-RIC bus.

Table 7 describes the types of transmitted data, either

actual or pseudo random data, of each port and over the

Inter-RIC bus. It is assumed that the repeater is powered

up in security mode (GLME=0).

For example, suppose the repeater is in security mode

(SME=1) and configured to perform address comparison

only on destination addresses (ESA=0 and EDA=1). If a

packet is received whose destination address does not

match with that stored address in a designated CAM, then

all the transmitting ports switch to random packet, while the

data is transmitted intact over the Inter-RIC bus. The other

cascaded repeaters will compare the packet’s destination

address with their own internal CAMs for proper decision

making.

Note: SME: Security Mode bit in the Port Security Configuration Register (PSCR).

ESA: Source Address Security bit in the PSCR register.

EDA: Destination Address Security bit in the PSCR register.

Table 7. Local Ports and Inter-RIC Bus Data Field Contents

SME

ESA

EDA

Source

Address

of Packet

Destination

Address

of Packet

Transmitting

ports

Inter-RIC

Bus

repeat

match

repeat

match

mismatch

random

repeat

mismatch

match

repeat

mismatch

random

repeat

match

repeat

match

mismatch

repeat

mismatch

random

match

repeat

match

mismatch

random

repeat

mismatch

random

DP83953 Datasheet(PDF) 49 Page - National Semiconductor (TI)

DP83953 Datasheet(HTML) 49 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90

Datasheet Download

Link URL