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BQ76PL455APFCT Datasheet(PDF) 6 Page - Texas Instruments |
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BQ76PL455APFCT Datasheet(HTML) 6 Page - Texas Instruments |
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6 / 125 page ![]() 6 bq76PL455A SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: bq76PL455A Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated Pin Functions (continued) NAME TYPE(1) DESCRIPTION PIN NO. VP 70 P 5.3-V regulated analog power supply input/sense pin. Connect to external NPN transistor's emitter and decouple with a 0.1-µF capacitor(3) to AGND and a 4.7-µF capacitor(3) in series with a 0.390-Ω resistor to GND. Locate decoupling capacitors as close to the VP pin as possible. Always connect VDIG to VP with 1-Ω resistor. VREF 67 P VREF output filter pin. Decouple with parallel 0.1-µF and 1.8-µF (25 V+) capacitors(3) to the ground plane. Locate decoupling capacitors as close to the pin as possible. To maintain measurement fidelity, do not place external loads on this pin. VSENSE0 29 AI Connect to the negative pin of the 1st cell. VSENSE1 27 AI Channel 1. Connect to the positive pin of the 1st cell. VSENSE2 25 AI Channel 2. Connect to the positive pin of the 2nd cell. VSENSE3 23 AI Channel 3. Connect to the positive pin of the 3rd cell. VSENSE4 21 AI Channel 4. Connect to the positive pin of the 4th cell. VSENSE5 19 AI Channel 5. Connect to the positive pin of the 5th cell. VSENSE6 17 AI Channel 6. Connect to the positive pin of the 6th cell. VSENSE7 15 AI Channel 7. Connect to the positive pin of the 7th cell. VSENSE8 13 AI Channel 8. Connect to the positive pin of the 8th cell. VSENSE9 11 AI Channel 9. Connect to the positive pin of the 9th cell. VSENSE10 9 AI Channel 10. Connect to the positive pin of the 10th cell. VSENSE11 7 AI Channel 11. Connect to the positive pin of the 11th cell. VSENSE12 5 AI Channel 12.Connect to the positive pin of the 12th cell. VSENSE13 3 AI Channel 13. Connect to the positive pin of the 13th cell. VSENSE14 1 AI Channel 14. Connect to the positive pin of the 14th cell. VSENSE15 79 AI Channel 15. Connect to the positive pin of the 15th cell. VSENSE16 77 AI Channel 16. Connect to the positive pin of the 16th cell. WAKEUP 49 DI Wakeup input. Pull this pin low or tie to ground if not used. Do not allow this pin to float at any time. (1) Key: AI = analog input; AO=analog output; DI = digital input; DO= digital output; DIO= digital I/O; P= Power; NC= no connect. (2) Externally connected pins as common ground or GND in the design. See Grounding for details. (3) All capacitors are type X7R or better, unless otherwise noted. |
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