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CS5530A Datasheet(PDF) 43 Page - Advanced Micro Devices |
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CS5530A Datasheet(HTML) 43 Page - Advanced Micro Devices |
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43 / 259 page ![]() AMD Geode™ CS5530A Companion Device Data Book 43 Signal Definitions Revision 1.1 FP_CLK M1 O Limited ISA Mode: Flat Panel Clock This is the clock for the flat panel interface. -- ISA Master Mode: No Function In the ISA Master mode of operation, the CS5530A cannot support TFT flat panels or TV controllers. FP_CLK_EVEN L3 O Limited ISA Mode: Flat Panel Even Clock This is an optional output clock for a set of external latches used to de-multi- plex the flat panel data bus into two channels (odd/even). Typically this would be used to interface to a pair of LVDS transmitters driving an XGA resolution flat panel. F4BAR+Memory Offset 04h[12] enables the FP_CLK_EVEN output: 0 = Standard flat panel 1 = XGA flat panel -- ISA Master Mode: No Function In the ISA Master mode of operation, the CS5530A can not support TFT flat panels or TV controllers. FP_HSYNC C2 I Limited ISA Mode: Flat Panel Horizontal Sync Input This is the horizontal sync input reference from the processor’s display con- troller. The timing of this signal is independent of the standard (CRT) hori- zontal sync input to allow a different timing relationship between the flat panel and an attached CRT. -- ISA Master Mode: No Function In the ISA Master mode of operation, the CS5530A can not support TFT flat panels or TV controllers. FP_HSYNC_OUT /SMEMW# E1 O Limited ISA Mode: Flat Panel Horizontal Sync Output This is the horizontal sync for an attached active matrix TFT flat panel. This represents a delayed version of the input flat panel horizontal sync signal with the appropriate pipeline delay relative to the pixel data. ISA Master Mode: System Memory Write Refer to Section 3.2.5 "ISA Bus Interface" on page 34 for this signal’s defini- tion. FP_VSYNC C1 I Limited ISA Mode: Flat Panel Vertical Sync Input This is the vertical sync input reference from the processor’s display control- ler. The timing of this signal is independent of the standard (CRT) vertical sync input to allow a different timing relationship between the flat panel and an attached CRT. -- ISA Master Mode: No Function In the ISA Master mode of operation, the CS5530A can not support TFT flat panels or TV controllers. FP_VSYNC_OUT /SMEMR# E3 O Limited ISA Mode: Flat Panel Vertical Sync Output This is the vertical sync for an attached active matrix TFT flat panel. This represents a delayed version of the input flat panel vertical sync signal with the appropriate pipeline delay relative to the pixel data. ISA Master Mode: System Memory Read Refer to Section 3.2.5 "ISA Bus Interface" on page 34 on for this signal’s def- inition. 3.2.11 Display Interface (Continued) Signal Name Pin No. Pin Type Description |
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