CS5530A datasheet(45/259 Pages) AMD

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AMD Geode™ CS5530A Companion Device Data Book

Signal Definitions

Revision 1.1

3.2.12

DCLK PLL

Signal Name

No.

Type

Description

PLLTEST

N23

PLLTEST

Internal test pin. This pin should not be connected for normal operation.

PLLVAA

M25

Analog

Analog PLL Power (VDD)

PLLVAA is the analog positive rail power connection to the PLL.

PLLAGD

N25

Analog

Analog PLL Ground (VSS)

PLLAGD is the analog ground rail connection to the PLL.

PLLDVD

M23

Analog

Digital PLL Power (VDD)

This pin is the digital VDD power connection for the PLL.

PLLDGN

N26

Analog

Digital PLL Ground (VSS)

This pin is the digital ground (VSS) connection for the PLL.

3.2.13

Power, Ground, and No Connects

Signal Name

Pin No.

Type

Description

VDD

Refer to

Table 3-3

(Total of 17)

PWR

3.3V (Nominal) Power Connection

Note that the USB power (VDD_USB, AVDD_USB) connections are

listed in Section 3.2.8 "USB Interface" on page 39.

VSS

Refer to

Table 3-3

(Total of 38)

GND

Ground Connection

Note that the USB ground (AVSS_USB) connection is listed in Section

3.2.8 "USB Interface" on page 39.

Refer to

Table 3-3

(Total of 20)

No Connection

These lines should be left disconnected. Connecting a pull-up/-down

resistor or to an active signal could cause unexpected results and pos-

sible malfunctions.

3.2.14

Internal Test and Measurement

Signal Name

No.

Type

Description

TEST

Test Mode

TEST should be tied low for normal operation.

CS5530A Datasheet(PDF) 45 Page - Advanced Micro Devices

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