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HD64F2145 Datasheet(PDF) 130 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 130 Page - Renesas Technology Corp |
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130 / 829 page ![]() Rev. 2.0, 08/02, page 90 of 788 • BARB Bit Bit Name Initial Value R/W Description 7 to 0 A15 to A8 All 0 R/W Addresses 15 to 8 The A15 to A8 bits are compared with A15 to A8 in the internal address bus. • BARC Bit Bit Name Initial Value R/W Description 7 to 1 A7 to A1 All 0 R/W Addresses 7 to 1 The A7 to A1 bits are compared with A7 to A1 in the internal address bus. 0— 0 R Reserved This bit is always read as 0 and cannot be modified. 5.3.4 IRQ Sense Control Registers (ISCRH, ISCRL) The ISCR registers select the source that generates an interrupt request at pins ,54: to ,543. • ISCRH Bit Bit Name Initial Value R/W Description 7 6 IRQ7SCB IRQ7SCA 0 0 R/W R/W 5 4 IRQ6SCB IRQ6SCA 0 0 R/W R/W 3 2 IRQ5SCB IRQ5SCA 0 0 R/W R/W 1 0 IRQ4SCB IRQ4SCA 0 0 R/W R/W IRQn Sense Control B IRQn Sense Control A 00: Interrupt request generated at low level of ,54Q input 01: Interrupt request generated at falling edge of ,54Q input 10: Interrupt request generated at rising edge of ,54Q input 11: Interrupt request generated at both falling and rising edges of ,54Q input (n = 7 to 4) |
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