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HD64F2145 Datasheet(PDF) 231 Page - Renesas Technology Corp |
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HD64F2145 Datasheet(HTML) 231 Page - Renesas Technology Corp |
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231 / 829 page ![]() Rev. 2.0, 08/02, page 191 of 788 • P90//:5/,545/$'75*/(&65 The pin function is switched as shown below according to the combination of operating mode, the ABW bit in WSCR, the HI12E and CS2E bits in SYSCR2, the FGA20E bit in HICR, and the P90DDR bit. Operating Mode Modes 1, 2, 3 (EXPE = 1) Modes 2, 3 (EXPE = 0) ABW 0 1 — HI12E — 1 FGA20E — 1 CS2E — Any one 0 1 P90DDR — 0 1 0 1 — P90 input pin P90 output pin P90 input pin P90 output pin (&65 input pin Pin Function /:5 output pin ,545 input pin, $'75* input pin* Note:* When the IRQ2E bit in IER is set to 1 in mode 1, 2, or 3 (EXPE = 1) with the ABW bit in WSCR set to 1, or in mode 2 and 3 (EXPE = 0), this pin is used as the ,545 input pin. When TRGS1 and TRGS0 in ADCR of the A/D converter are both set to 1, this pin is used as the $'75* input pin. 8.11 Port A Port A is an 8-bit I/O port. Port A pins also function as keyboard buffer controller I/O pins, key- sense interrupt input pins, expansion A/D converter input pins, and address output pins. Port A pin functions change according to the operating mode. Port A input/output operates by VccB power independent from the Vcc power. Up to 5 V can be applied to port A pins if VccB power is 5 V. Port A has the following registers. PADDR and PAPIN have the same address. • Port A data direction register (PADDR) • Port A output data register (PAODR) • Port A input data register (PAPIN) |
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