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LTM4677 Datasheet(PDF) 35 Page - Analog Devices

Part # LTM4677
Description  Dual Loop 8-Phase Step-Down DC/DC Controller with Digital Power System Management
PDF  110 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4677 Datasheet(HTML) 35 Page - Analog Devices

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LTC3888-1
35
Rev. 0
For more information www.analog.com
OPERATION
SERIAL INTERFACE
The LTC3888-1 has a PMBus compliant serial interface
that can operate at any frequency between 10kHz and
400kHz. The LTC3888-1 is a bus slave device that commu-
nicates bidirectionally with a host (master) using standard
PMBus protocols. The Timing Diagram found earlier in
this document, along with related Electrical Characteristics
table entries, define the timing relationships of the SDA
and SCL bus signals. SDA and SCL must be high when
the bus is not in use. External pull-up resistors or current
sources are required on these lines.
PMBus, an incremental extension of the SMBus standard,
offers more robust operation than a 2-wire I2C interface.
In addition to adding a protocol layer to improve interop-
erability and facilitate reuse, PMBus supports bus time-
out recovery for system reliability, optional packet error
checking (PEC) to ensure data integrity, and peripheral
hardware alerts for system fault management. In general,
a programmable device capable of functioning as an I2C
bus master can be configured for PMBus management
with little or no change to hardware. However, not all
I2C controllers support repeat start (restart) required for
PMBus reads.
For a description of the minor extensions and exceptions
PMBus makes to the SMBus standard, refer to PMBus
Specification Part I Revision 1.2 Paragraph 5 on Transport.
For a description of the differences between SMBus
and I2C, refer to System Management Bus (SMBus)
Specification Version 2.0 Appendix B on Differences
Between SMBus and I2C.
The user is encouraged to reference Part I of the latest
PMBus Power System Management Protocol Specification
to understand how to interface the LTC3888-1 to a PMBus
system. This specification can be found at http://www.
pmbus.org/specs.html.
The LTC3888-1 uses the following standard serial
interface protocols defined in the SMBus and PMBus
specifications:
• Quick Command
• Send Byte
• Write Byte
• Write Word
• Read Byte
• Read Word
• Block Read
• Block Write – Block Read Process Call
• Alert Response Address
The LTC3888-1 does not require PEC for Quick Command
under any circumstances. The LTC3888-1 also supports
group command protocol (GCP) as required by PMBus
specification Part I, section 5.2.3. GCP is used to send
commands to more than one PMBus device in one contin-
uous transmission. It should not be used with commands
that require the receiving device to respond with data,
such as a STATUS_BYTE command. Refer to Part I of the
PMBus specification for additional details on using GCP.
All LTC3888-1 message transmission types allow
for packet error checking. The later section on Serial
Communication Errors provides more detail on packet
error checking.
Figure 5 to Figure 21 illustrate these protocols. Figure 4
provides a key to the protocol diagrams. Not all proto-
col elements will be present in every data packet. For
instance, not all packets are required to include the packet
error code. A number shown above a field in these dia-
grams indicates the number of bits in that field. All data
transfers are initiated by the present bus master regard-
less of how many times data direction flow may change
during the subsequent transmission. The LTC3888-1
never functions as a bus master.
This device includes handshaking features to ensure
robust system communication. Please refer to the PMBus
Communication and Command Processing section in
Applications Information for more details.



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