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LTM4677 Datasheet(PDF) 60 Page - Analog Devices

Part # LTM4677
Description  Dual Loop 8-Phase Step-Down DC/DC Controller with Digital Power System Management
PDF  110 Pages
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Manufacturer  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

LTM4677 Datasheet(HTML) 60 Page - Analog Devices

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LTC3888-1
60
Rev. 0
For more information www.analog.com
RESISTOR CONFIGURATION PINS
As a factory default, the LTC3888-1 is programmed to
use external resistor configuration, allowing output cur-
rent limit, PWM frequency and phasing, and the PMBus
address to be set without programming the part through
its serial interface or purchasing devices with custom
EEPROM contents. An 18.7kΩ resistor with a tolerance
of 1% or better must be wired between the RSET pin and
GND. This component establishes the correct bias level
for the remaining RCONFIG pins, which are programmed
with a resistor to GND. The RCONFIG pins are only inter-
rogated at initial power up and during a reset, so modify-
ing their values on the fly is not recommended. RCONFIG
pins on the same IC can share a single resistor if they
require identical programming. Resistors with a tolerance
of 1% or better must be used to assure proper operation.
Noisy clock signals should not be routed near these pins.
Output current limit can be set as shown in Table 10. For
example, setting this resistor to 4.42kΩ is equivalent to
programming a IOUT_OC_WARN_LIMIT value of 32A
with IOUT_OC_FAULT_LIMIT set to 40A.
Table 10. Resistor Programming of OC Warning and Fault Limits
RCONFIG (kΩ) IOUT_OC_WARN_LIMIT (A) IOUT_OC_FAULT_LIMIT (A)
OPEN
from EEPROM
from EEPROM
11.8
68
85
10.2
64
80
9.31
60
75
8.66
56
70
7.87
52
65
7.15
48
60
6.49
44
55
5.9
40
50
5.11
36
45
4.42
32
40
3.74
28
35
3.09
24
30
2.43
20
25
1.74
16
20
1.02
12
15
GND
8
10
Any of the single-IC master/slave configurations that the
LTC3888-1 supports can be programmed with PWM_CFG
using one of two frequencies as shown in Table 11. Phase
expansion is not supported when using an external resis-
tor to set master/slave configuration.
APPLICATIONS INFORMATION
The LTC3888-1 address is selected based on the pro-
gramming of the two configuration pins ASEL0 and
ASEL1 according to Table 12. ASEL0 programs the bot-
tom four bits of the device address for the LTC3888-1,
and ASEL1 programs the three most-significant bits.
Either portion of the address can also be retrieved from
the MFR_ADDRESS value in EEPROM. If both pins are
left open, the full 7-bit MFR_ADDRESS value stored in
EEPROM is used to determine the device address. It is
recommended that each LTC3888-1 in a system have a
unique address, and the ASEL pins provide an efficient
way to accomplish this without a plethora of custom
EEPPOM programming. The LTC3888-1 also responds
to 7-bit global addresses 0x5A and 0x5B. MFR_ADDRESS
and MFR_RAIL_ADDRESS should not be set to either of
these values.
Table 11. PWM_CFG Resistor Programming
RCONFIG (kΩ)
MFR_PWM_CONFIG_LTC3888-1[3:0]
SWITCHING
FREQUENCY
(kHz)
BINARY
MASTER/SLAVE
OPEN
from EEPROM
11.8
0111
7 + 1
550
10.2
0110
6 + 2
9.31
0101
6 + 1
8.66
0100
5 + 3
7.87
0011
4 + 4 (or 8-phase)
7.15
0010
4 + 3
6.49
0001
4 + 2
5.9
0000
3 + 3
5.11
0111
7 + 1
450
4.42
0110
6 + 2
3.74
0101
6 + 1
3.09
0100
5 + 3
2.43
0011
4 + 4 (or 8-phase)
1.74
0010
4 + 3
1.02
0001
4 + 2
GND
0000
3 + 3



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