LTM4677 datasheet(29/110 Pages) AD

29 / 110 page

LTC3888-1

Rev. 0

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OPERATION

The RUN pin must be released by any controlling exter-

nal application circuits for that channel to restart from the

latch off state. As the RUN pin for a given rail rises, asso-

ciated internal fault indications are cleared automatically.

The LTC3888-1 can also be programmed to clear faults

for both master channels based solely on the run state of

just one channel. See the MFR_CONFIG_ALL command.

CLEAR_FAULTS can also be used to clear all fault bits at

any time, independent of PWM channel state.

Higher-level handling of some internally generated faults

can be digitally deglitched. External faults propagated into

the chip using FAULT pins are not deglitched. Refer to the

following section on FAULT Pin I/O.

STATUS REGISTERS AND ALERT MASKING

Figure 2 summarizes the internal LTC3888-1 status reg-

isters accessible by PMBus command. These contain

indication of various faults, warnings and other impor-

tant operating conditions. As shown, STATUS_BYTE and

STATUS_WORD also summarize contents of other status

registers. Refer to PMBus Command Details for specific

information.

NONE OF THE ABOVE in STATUS_BYTE indicates that

one or more of the bits in the most-significant nibble of

STATUS_WORD are also set.

Figure 2 also shows which of the status bits will assert

ALERT if set and not masked. Once set, ALERT will remain

low until one of the following occurs.

• A CLEAR_FAULTS, RESTORE_USER_ALL or MFR_

RESET Command Is Issued

• The Related Status Bit Is Written to a One

• The Faulted Channel Is Properly Commanded Off and

Back On

• The LTC3888-1 Successfully Transmits Its Address

During a PMBus Alert Response Address (ARA)

• IC Supply Power Is Cycled

With some exceptions, the SMBALERT_MASK command

can be used to prevent the LTC3888-1 from asserting

ALERT on a bit-by-bit basis by register. These mask set-

tings are promoted to STATUS_WORD and STATUS_BYTE

in the same fashion as the status bits themselves. For

example, if ALERT is masked for all bits in Channel 0

STATUS_VOUT, then ALERT is effectively masked for the

VOUT bit in STATUS_WORD for PAGE 0.

The BUSY bit in STATUS_BYTE also asserts ALERT and

cannot be masked. This bit can be set as a result of inter-

action between internal operations and PMBus communi-

cation. This fault occurs when a command is received that

cannot be safely executed with one or both master chan-

nels enabled. As discussed in Application Information,

BUSY faults can be avoided by polling MFR_COMMON

before executing some commands.

Status information contained in MFR_COMMON and

MFR_PADS_LTC3888-1 can be used to clarify the con-

tents of STATUS_BYTE or STATUS_WORD as shown,

but the contents of these registers do not affect the state

of the ALERT pin and may not directly influence bits in

STATUS_BYTE or STATUS_WORD.

FAULT PIN I/O

The LTC3888-1 can map various fault indicators to their

respective FAULT pin using the MFR_FAULT_PROPAGATE

command.

Channel-to-channel fault dependencies and communica-

tion can be created by connecting FAULT pins together. In

the event of an internal fault, one or more of the channels

is configured to pull the bussed FAULT pins low. All chan-

nels are then configured to shut down when the bussed

FAULT pins are pulled low (MFR_FAULT_RESPONSE set

to 0xC0). If latch off is the programmed response on the

faulted channel, the FAULT pin remains low until one of

the following occurs:

• A CLEAR_FAULTS, RESTORE_USER_ALL or MFR_

RESET Command Is Issued

• The Related Status Bit Is Written to a One

• The Faulted Channel Is Properly Commanded Off and

Back On

• IC Supply Power Is Cycled

For autonomous group retry, the faulted channel is con-

figured to release the FAULT pin(s) after a retry interval,

LTM4677 Datasheet(PDF) 29 Page - Analog Devices

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