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DSPIC33EP128GS708 Datasheet(PDF) 427 Page - Microchip Technology |
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DSPIC33EP128GS708 Datasheet(HTML) 427 Page - Microchip Technology |
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427 / 484 page  2016-2018 Microchip Technology Inc. DS70005258C-page 427 dsPIC33EPXXXGS70X/80X FAMILY TABLE 30-47: I2Cx BUS DATA TIMING REQUIREMENTS (MASTER MODE) AC CHARACTERISTICS Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) Operating temperature -40°C TA +85°C for Industrial -40°C TA +125°C for Extended Param No. Symbol Characteristic(4) Min.(1) Max. Units Conditions IM10 TLO:SCL Clock Low Time 100 kHz mode TCY/2 (BRG + 2) — µs 400 kHz mode TCY/2 (BRG + 2) — µs 1 MHz mode(2) TCY/2 (BRG + 2) — µs IM11 THI:SCL Clock High Time 100 kHz mode TCY/2 (BRG + 2) — µs 400 kHz mode TCY/2 (BRG + 2) — µs 1 MHz mode(2) TCY/2 (BRG + 2) — µs IM20 TF:SCL SDAx and SCLx Fall Time 100 kHz mode — 300 ns CB is specified to be from 10 to 400 pF 400 kHz mode 20 + 0.1 CB 300 ns 1 MHz mode(2) — 100 ns IM21 TR:SCL SDAx and SCLx Rise Time 100 kHz mode — 1000 ns CB is specified to be from 10 to 400 pF 400 kHz mode 20 + 0.1 CB 300 ns 1 MHz mode(2) — 300 ns IM25 TSU:DAT Data Input Setup Time 100 kHz mode 250 — ns 400 kHz mode 100 — ns 1 MHz mode(2) 40 — ns IM26 THD:DAT Data Input Hold Time 100 kHz mode 0 — µs 400 kHz mode 0 0.9 µs 1 MHz mode(2) 0.2 — µs IM30 TSU:STA Start Condition Setup Time 100 kHz mode TCY/2 (BRG + 2) — µs Only relevant for Repeated Start condition 400 kHz mode TCY/2 (BRG + 2) — µs 1 MHz mode(2) TCY/2 (BRG + 2) — µs IM31 THD:STA Start Condition Hold Time 100 kHz mode TCY/2 (BRG + 2) — µs After this period, the first clock pulse is generated 400 kHz mode TCY/2 (BRG +2) — µs 1 MHz mode(2) TCY/2 (BRG + 2) — µs IM33 TSU:STO Stop Condition Setup Time 100 kHz mode TCY/2 (BRG + 2) — µs 400 kHz mode TCY/2 (BRG + 2) — µs 1 MHz mode(2) TCY/2 (BRG + 2) — µs IM34 THD:STO Stop Condition Hold Time 100 kHz mode TCY/2 (BRG + 2) — µs 400 kHz mode TCY/2 (BRG + 2) — µs 1 MHz mode(2) TCY/2 (BRG + 2) — µs IM40 TAA:SCL Output Valid from Clock 100 kHz mode — 3500 ns 400 kHz mode — 1000 ns 1 MHz mode(2) — 400 ns IM45 TBF:SDA Bus Free Time 100 kHz mode 4.7 — µs Time the bus must be free before a new transmission can start 400 kHz mode 1.3 — µs 1 MHz mode(2) 0.5 — µs IM50 CB Bus Capacitive Loading — 400 pF IM51 TPGD Pulse Gobbler Delay 65 390 ns (Note 3) Note 1: BRG is the value of the I2C Baud Rate Generator. 2: Maximum Pin Capacitance = 10 pF for all I2Cx pins (for 1 MHz mode only). 3: Typical value for this parameter is 130 ns. 4: These parameters are characterized but not tested in manufacturing. |
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