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Z8F082ASH020SC Datasheet(PDF) 103 Page - Zilog, Inc. |
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Z8F082ASH020SC Datasheet(HTML) 103 Page - Zilog, Inc. |
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103 / 244 page ![]() PS024705-0405 P R E L I M I N A R Y UART Z8 Encore! XP® F08xA Seriess Product Specification 85 Figure 9.UART Block Diagram Operation Data Format The UART always transmits and receives data in an 8-bit data format, least-significant bit first. An even or odd parity bit can be added to the data stream. Each character begins with an active Low Start bit and ends with either 1 or 2 active High Stop bits. Figures 10 and 11 illustrates the asynchronous data format employed by the UART without parity and with parity, respectively. Receive Shifter Receive Data Transmit Data Transmit Shift TXD RXD System Bus Parity Checker Parity Generator Receiver Control Control Registers Transmitter Control CTS Status Register Register Register Register Baud Rate Generator DE with Address Compare |
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