CS47L85 datasheet(86/370 Pages) CIRRUS

86 / 370 page

CS47L85

Rev 4.3

SIGNAL ACTIVITY DETECT

The DRC incorporates a configurable signal detect function, allowing the signal level at the DRC input to be monitored and

to be used to trigger other events. This can be used to detect the presence of a microphone signal on an ADC or digital mic

channel, or can be used to detect an audio signal received over the digital audio interface.

The DRC Signal Detect function is enabled by setting DRCn_SIG_DET register bit. (Note that the respective DRCn must

also be enabled.) The detection threshold is either a Peak level (Crest Factor) or an RMS level, depending on the

DRCn_SIG_DET_MODE register bit. When Peak level is selected, the threshold is determined by DRCn_SIG_DET_PK,

which defines the applicable Crest Factor (Peak to RMS ratio) threshold. If RMS level is selected, then the threshold is set

using DRCn_SIG_DET_RMS.

The DRC Signal Detect function is an input to the Interrupt control circuit and can be used to trigger an Interrupt event - see

“Interrupts”.

The Control Write Sequencer can be triggered by the DRC1 Signal Detect function. This is enabled using the

DRC1_WSEQ_SIG_DET_ENA re

gister bit. See “Control Write Sequencer” for further details.

Note that signal detection is supported on DRC1 and DRC2, but the triggering of the Control Write Sequencer is available

on DRC1 only.

DRC REGISTER CONTROLS

The DRC control registers are described in Table 14 and Table 15 for DRC1 and DRC2 respectively.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R3585

(0E01h)

FX_Ctrl2

15:4

FX_STS [11:0]

00h

LHPF, DRC, EQ Enable Status

Indicates the status of each of the

respective signal processing

functions.

[11] = EQ4

[10] = EQ3

[9] = EQ2

[8] = EQ1

[7] = DRC2 (Right)

[6] = DRC2 (Left)

[5] = DRC1 (Right)

[4] = DRC1 (Left)

[3] = LHPF4

[2] = LHPF3

[1] = LHPF2

[0] = LHPF1

Each bit is coded as:

0 = Disabled

1 = Enabled

R3712

(0E80h)

DRC1_ctrl1

15:11

DRC1_SIG_DET

_RMS [4:0]

00h

DRC1 Signal Detect RMS

Threshold.

This is the RMS signal level for

signal detect to be indicated when

DRC1_SIG_DET_MODE=1.

00h = -30dB

01h = -31.5dB

…. (1.5dB steps)

1Eh = -75dB

1Fh = -76.5dB

CS47L85 Datasheet(PDF) 86 Page - Cirrus Logic

CS47L85 Datasheet(HTML) 86 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL