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VSC8541XMV-05 Datasheet(PDF) 36 Page - Microchip Technology

Part # VSC8541XMV-05
Description  Single Port Gigabit Ethernet Copper PHY with GMII/RGMII/MII/RMII Interfaces
PDF  101 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

VSC8541XMV-05 Datasheet(HTML) 36 Page - Microchip Technology

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Functional Descriptions
VMDS-10513 VSC8541-02 Datasheet Revision 4.1
27
When using the connector loopback testing feature, the device auto-negotiation, speed, and duplex
configuration is set using device registers 0,4, and 9.
For 1000BASE-T connector loopback, additional writes are required in the following order:
1.
Enable the 1000BASE-T connector loopback. Set register bit 24.0 to 1.
2.
Disable pair swap correction. Set register bit 18.5 to 1.
3.17.5
VeriPHY Cable Diagnostics
The VSC8541-02 includes a comprehensive suite of cable diagnostic functions that are available using
SMI reads and writes. These functions enable a variety of cable operating conditions and status to be
accessed and checked. The VeriPHY suite has the ability to identify the cable length and operating
conditions and to isolate a variety of common faults that can occur on Cat5 twisted pair cabling.
For functional details of the VeriPHY suite and the operating instructions, see the ENT-AN0125 PHY,
Integrated PHY-Switch VeriPHY - Cable Diagnostics application note.
3.18
Configuration
The VSC8541-02 device can be configured by setting internal memory registers using the management
interface or by using the unmanaged mode as described in Unmanaged Mode, page 9.
3.18.1
Managed Applications
To configure the device using the management interface, perform the following steps:
1.
COMA_MODE active, drive high (optional).
2.
Apply power.
3.
Apply RefClk.
4.
Release reset, drive high. Power and clock must be high before releasing reset.
5.
Wait 15 ms minimum.
6.
Apply patch from PHY_API if available (required for production release, optional for board testing).
7.
Configure register 23 for MAC interface mode.
•
Read register 23 (to access register 23, register 31 must be 0).
•
Set bits 12:11, MAC configuration, as follows:
00: GMII/MII
10: RGMII
01: RMII
•
Write new register 23.
8.
Software reset.
•
Read register 0 (to access register 0, register 31 must be 0).
•
Set bit 15 to 1.
•
Write new register 0.
9.
Read register 0 until bit 15 equals to 0.
10. For RGMII mode: configure register 20E2 (to access register 20E2, register 31 must be set to 2).
Set bit 11 to 0 and set RX_CLK delay and TX_CLK delay accordingly through bit [6:4] and/or bit [2:0]
respectively.
11. Release the COMA_MODE pin, drive low (only necessary if COMA_MODE pin is driven high or
unconnected).
3.18.2
Unmanaged Applications
To configure the device using unmanaged mode, perform the following steps:
1.
Apply power.
2.
Apply RefClk.
3.
Release reset, drive high. Power and clock must be high before releasing reset.
4.
Wait 15 ms minimum.
5.
(Optional) For applications that gain register access to the device using the management interface,
steps 6–10 can then be performed in order to modify default settings.



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