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CLRC663 Datasheet(PDF) 101 Page - NXP Semiconductors |
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CLRC663 Datasheet(HTML) 101 Page - NXP Semiconductors |
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101 / 177 page  NXP Semiconductors CLRC663 High performance multi-protocol NFC frontend CLRC663 and CLRC663 plus Bit 7 6 5 4 3 2 1 0 Access rights r r r r r r r r Table 197. PadIn register (address 46h)...continued Bit Symbol Description 7 SIGIN_IN Input buffer of the SIGIN pin 6 CLKOUT_IN Input buffer of the CLKOUT pin 5 IFSEL1_IN Input buffer of the IFSEL1 pin 4 IFSEL0_IN Input buffer of the IFSEL0 pin 3 TCK_IN Input buffer of the TCK pin 2 TMS_IN Input buffer of the TMS pin 1 TDI_IN Input buffer of the TDI pin 0 TDO_IN Input buffer of the TDO pin Table 198. PadIn bits 9.15.4 SigOut Bit 7 6 5 4 3 2 1 0 Symbol Pad Speed RFU SigOutSel Access rights r/w - r/w Table 199. SigOut register (address 47h) Bit Symbol Description 7 PadSpeed If set, the I/O pins are supporting a fast switching mode.The fast mode for the I/O’s will increase the peak current consumption of the device, especially if multiple I/Os are switching at the same time. The power supply needs to be designed to deliver this peak current. 6 to 4 RFU - 3 to 0 SIGOutSel 0h, 1h - The pin SIGOUT is 3-state 2h - The pin SIGOUT is 0 3h - The pin SIGOUT is 1 4h - The pin SIGOUT shows the TX-envelope 5h - The pin SIGOUT shows the TX-active signal 6h - The pin SIGOUT shows the S3C (generic) signal 7h - The pin SIGOUT shows the RX-envelope (only valid for ISO/IEC 14443A, 106 kBd) 8h - The pin SIGOUT shows the RX-active signal 9h - The pin SIGOUT shows the RX-bit signal 0Ah ...0Fh: RFU Table 200. SigOut bits CLRC663 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 5.3 — 3 January 2024 101 / 177 |
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