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CLRC63201T/0FE Datasheet(PDF) 134 Page - NXP Semiconductors |
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CLRC63201T/0FE Datasheet(HTML) 134 Page - NXP Semiconductors |
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134 / 163 page  Philips Semiconductors Product Specification Rev. 3.0; May 2003 Multiple Protocol Contactless Reader IC CL RC632 134 Confidential 18.7.2.2 CRC-Coprocessor Settings For the CRC-Coprocessor the following parameters may be configured: Parameter Value Bit Register CRC Register Length 8 Bit or 16 Bit CRC CRC8 ChannelRedundancy CRC Algorithm Algorithm according ISO14443-A or according ISO/IEC3309 CRC3309 ChannelRedundancy CRC Preset Value Any CRCPresetLSB, CRCPresetMSB CRCPresetLSB, CRCPresetMSB Table 18-8: CRC-Coprocessor Parameters The CRC polynomial for the 8-bit CRC is fixed to 1 2 3 4 8 + + + + x x x x . The CRC polynomial for the 16-bit CRC is fixed to 1 5 12 16 + + + x x x . 18.7.2.3 Status Flags of the CRC-Coprocessor The status flag CRCReady indicates, that the CRC-Coprocessor has finished processing of all data bytes found in the FIFO buffer. With the CRCReady flag setting to 1, an interrupt is requested with TxIRq being set. This supports interrupt driven usage of the CRC-Coprocessor. When CRCReady and TxIRq are set to 1, respectively, the content of the CRCResultLSB- and CRCResultMSB-register and the flag CRCErr is valid. The CRCResultLSB- and CRCResultMSB-register hold the content of the CRC register, the CRCErr flag indicates CRC validity for the processed data. 18.8 Error Handling during Command Execution If any error is detected during command execution, this is shown by setting the status flag Err in the PrimaryStatus Register. For information about the cause of the error, the µ-Processor may evaluate the status flags in the ErrorFlag Register. Error Flag of the ErrorFlag Register Related to Command KeyErr LoadKeyE2, LoadKey AccessError WriteE2, ReadE2, LoadConfig FIFOOvl No specific commands CRCErr Receive, Transceive, CalcCRC FramingErr Receive, Transceive ParityErr Receive, Transceive CollErr Receive, Transceive Table 18-9: Error Flags Overview |
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