M32CSLASH8B datasheet(172/406 Pages) RENESAS

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M32C/8B Group

15. Timer A

Preliminary specification

Specifications in this manual are tentative and subject to change.

REJ09B0450-0050 Rev.0.50 Oct 31, 2008

Page 155 of 385

15.1.1

Timer Mode

In timer mode, the timer counts an internally generated count source.

Table 15.3 lists specifications of timer mode. Figure 15.14 shows a timer mode operation (Timer A).

Table 15.3

Specifications of Timer Mode

NOTES:

1. Bits CNT3 to CNT0 in the TCSPR register select no division (n = 0) or divide-by-2n (n = 1 to 15).

2. Wait for one or more count source cycles to write after the count starts.

Figure 15.14

Operation in Timer Mode (Timer A)

Item

Specification

Count source

f1, f8, f2n(1), fC32

Count operation

• Counter decrements

When the timer underflows, the contents of the reload register are reloaded

into the counter and the count continues.

Counter cycle

n + 1

fj: count source frequency

n: setting value of the TAi register (i = 0 to 4), 0000h to FFFFh

Count start condition

The TAiS bit in the TABSR register is set to 1 (count starts)

Count stop condition

The TAiS bit is set to 0 (count stops)

Interrupt request generation timing When the timer underflows

TAiIN pin function

Input for gate function

TAiOUT pin function

Pulse output

Read from timer

A read from the TAi register returns a counter value

Write to timer

• A write to the TAi register while the count is stopped:

The value is written to both the reload register and the counter.

• A write to the TAi register while counting:

The value is written to the reload register (It is transferred to the counter at the

next reload timing).(2)

Selectable function

• Gate function

A signal applied to the TAiIN pin determines whether the count starts or stops.

• Pulse output function

The polarity of the TAiOUT pin is inverted whenever the timer underflows.

The TAiOUT pin outputs an “L” signal while the TAiS bit is 0 (count stops).

Count starts

FFFFh

Count stops

i = 0 to 4

TAiS bit in the

TABSR register

Contents of the counter

n = contents of the reload

0000h

IR bit in the TAiIC

TAiOUT pin (output)

(Conditions) TAiMR register: Bits TMOD1 and TMOD0 are set to 00b (timer mode).

Bits MR2 and MR1 are set to 00b (gate function disabled).

Underflow

Reload

Underflow

Reload

Set to 0 by an interrupt request acknowledgement or by a program

“H”

“L”

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