PCA85133USLASH2DASLASHQ1 datasheet(16/44 Pages) NXP

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PCA85133_1

Product data sheet

Rev. 1 — 23 October 2009

16 of 44

NXP Semiconductors

PCA85133

Universal LCD driver for low multiplex rates

When display data is transmitted to the PCA85133, the received display bytes are stored

in the display RAM in accordance with the selected LCD drive mode. The data is stored as

it arrives and does not wait for the acknowledge cycle as with the commands. Depending

on the current multiplex drive mode, data is stored singularly, in pairs, triples or

quadruples. To illustrate the ﬁlling order, an example of a 7-segment display showing all

drive modes is given in Figure 10; the RAM ﬁlling organization depicted applies equally to

other LCD types.

The following applies to Figure 10:

• In static drive mode the eight transmitted data bits are placed into row 0 of eight

successive 4-bit RAM words.

• In 1:2 multiplex mode the eight transmitted data bits are placed in pairs into

row 0 and 1 of four successive 4-bit RAM words.

• In 1:3 multiplex mode the eight bits are placed in triples into row 0, 1 and 2 of three

successive 4-bit RAM words, with bit 3 of the third address left unchanged. It is not

recommended to use this bit in a display because of the difﬁcult addressing. This last

bit may, if necessary, be controlled by an additional transfer to this address, but care

should be taken to avoid overwriting adjacent data because always full bytes are

transmitted.

• In the 1:4 multiplex mode the eight transmitted data bits are placed in quadruples into

row 0, 1, 2, and 3 of two successive 4-bit RAM words.

7.11 Data pointer

The addressing mechanism for the display RAM is realized using a data pointer.

This allows the loading of an individual display data byte, or a series of display data bytes,

into any location of the display RAM. The sequence commences with the initialization of

the data pointer by the load-data-pointer command.

Following this command, an arriving data byte is stored at the display RAM address

indicated by the data pointer. The ﬁlling order is shown in Figure 10.

After each byte is stored, the content of the data pointer is automatically incremented by a

value dependent on the selected LCD drive mode:

• In static drive mode by eight

• In 1:2 multiplex drive mode by four

• In 1:3 multiplex drive mode by three

• In 1:4 multiplex drive mode by two

If an I2C-bus data access is terminated early then the state of the data pointer is unknown.

Consequently, the data pointer must be rewritten prior to further RAM accesses.

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