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PCA85133U/2DA/Q1 Datasheet(PDF) 22 Page - NXP Semiconductors |
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PCA85133U/2DA/Q1 Datasheet(HTML) 22 Page - NXP Semiconductors |
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22 / 44 page  PCA85133_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 1 — 23 October 2009 22 of 44 NXP Semiconductors PCA85133 Universal LCD driver for low multiplex rates The command bytes and control bytes are also acknowledged by all addressed PCA85133 connected to the bus. The display bytes are stored in the display RAM at the address specified by the data pointer and the subaddress counter. Both data pointer and subaddress counter are automatically updated. The acknowledgement after each byte is made only by the (A0, A1, and A2) addressed PCA85133. After the last display byte, the I2C-bus master issues a STOP condition (P). Alternatively a START may be asserted to RESTART an I2C-bus access. Fig 16. Control byte format Table 8. Control byte description Bit Symbol Value Description 7CO continue bit 0 last control byte 1 control bytes continue 6RS register selection 0 command register 1 data register 5 to 0 - not relevant mgl753 not relevant CO 7 6 5 4 3 210 RS MSB LSB |
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