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PCA85133U/2DA/Q1 Datasheet(PDF) 34 Page - NXP Semiconductors |
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PCA85133U/2DA/Q1 Datasheet(HTML) 34 Page - NXP Semiconductors |
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34 / 44 page  PCA85133_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 1 — 23 October 2009 34 of 44 NXP Semiconductors PCA85133 Universal LCD driver for low multiplex rates 13.3 Bump locations Table 22. Bump locations All x/y coordinates represent the position of the center of each bump with respect to the center (x/y = 0) of the chip; see Figure 23. Symbol Bump X ( µm) Y ( µm) Description SDAACK 1 −1022.67 −436.5 [1] I2C-bus acknowledge output SDAACK 2 −968.67 −436.5 SDAACK 3 −914.67 −436.5 SDA 4 −712.17 −436.5 [1] I2C-bus serial data input SDA 5 −658.17 −436.5 SDA 6 −604.17 −436.5 SCL 7 −433.17 −436.5 I2C-bus serial clock input SCL 8 −379.17 −436.5 SCL 9 −325.17 −436.5 CLK 10 −173.52 −436.5 clock input/output VDD 11 −61.47 −436.5 supply voltage VDD 12 −7.47 −436.5 VDD 13 46.53 −436.5 SYNC 14 149.58 −436.5 cascade synchronization input/output OSC 15 262.08 −436.5 oscillator select FF 16 345.78 −436.5 frame frequency select A0 17 429.48 −436.5 subaddress input A1 18 513.18 −436.5 A2 19 596.88 −436.5 SA0 20 680.58 −436.5 I2C-bus slave address input; bit 0 VSS 21 765.63 −436.5 ground supply voltage VSS 22 819.63 −436.5 VSS 23 873.63 −436.5 VLCD 24 979.83 −436.5 LCD supply voltage VLCD 25 1033.83 −436.5 VLCD 26 1087.83 −436.5 BP2 27 1176.03 −436.5 LCD backplane output BP0 28 1230.03 −436.5 S0 29 1284.03 −436.5 LCD segment output S1 30 1338.03 −436.5 S2 31 1392.03 −436.5 S3 32 1446.03 −436.5 S4 33 1500.03 −436.5 S5 34 1554.03 −436.5 S6 35 1608.03 −436.5 S7 36 1662.03 −436.5 S8 37 1716.03 −436.5 S9 38 1770.03 −436.5 |
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