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DAC7678SPW Datasheet(PDF) 37 Page - Texas Instruments

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Part # DAC7678SPW
Description  12-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output, Two-Wire Interface Digital-to-Analog Converter with 2.5V Internal Reference
PDF  52 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC7678SPW Datasheet(HTML) 37 Page - Texas Instruments

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DAC7678
www.ti.com
SBAS493A – FEBRUARY 2010 – REVISED AUGUST 2010
OPERATING EXAMPLES: DAC7678
For the following examples X = don’t care; value can be either '0' or '1'.
I2C Standard and Fast mode examples (ADDR0 and LDAC pin tied low) (TSSOP package)
Example 1: Write Mid Scale to Data Buffer A and Update Channel A Output
Command and
Start
Address
MSDB
LSDB
Stop
Access Byte
ACK
ACK
ACK
ACK
S
1001 0000
0000 0000
1000 0000
0000 XXXX
P
Channel A updates to Mid Scale after the falling edge of the last ACK cycle
SPACER
Example 2: Power-Down Channel B, C, and H with Hi-Z Output
Command and
Start
Address
MSDB
LSDB
Stop
Access Byte
ACK
ACK
ACK
ACK
S
1001 0000
0100 XXXX
X111 0000
110X XXXX
P
SPACER
Example 3: Read-back the value of the input register of Channel G
Command and
Repeated
MSDB (from
LSDB (from
Start
Address
Address
Access Byte
Start
DAC7678)
DAC7678)
ACK
ACK
ACK
ACK
S
1001 0000
0000 0110
Sr
1001 0001
XXXX XXXX
XXXX 0000
SPACER
Example 4: Write multiple bytes of data to Channel F
Write Full Scale and then Quarter Scale to Channel F
Command and
Start
Address
MSDB
LSDB
MSDB
LSDB
Stop
Access Byte
ACK
ACK
ACK
ACK*
ACK
ACK**
S
1001 0000
0000 0101
1111 1111
1111 XXXX
0100 0000
0000 XXXX
P
Channel F updates to Full Scale after the falling edge of the 4th ACK* cycle and then Channel F updates to
quarter scale after falling edge of the last ACK** cycle.
I2C High Speed mode example (ADDR0 and LDAC pin tied low) (TSSOP package)
SPACER
Example 5: Write Mid Scale and then Full Scale to all DAC channels
HS
Command
NOT
Repeated
Start
Master
Address
ACK
and Access
ACK
MSDB
ACK
LSDB
ACK
MSDB
ACK
LSDB
ACK
Stop
ACK
Start
Code
Byte
S
0000 1000
Sr
1001 0000
0011 1111
1000 0000
0000 XXXX
1111 1111
1111 XXXX
P
All Channels update to Mid Scale after the falling edge of the 4th ACK cycle and then all Channels update to Full
scale after falling edge of the last ACK cycle.
Copyright © 2010, Texas Instruments Incorporated
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