DAC7678SPW datasheet(39/52 Pages) TI

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O UT

REF

R + R

Gain

ø è

OUT

REF_PRE

REF_POST

HYST

REF_NOM

10 (ppm/°C)

OUT

REFIN/

REFOUT

REFEXT

+6V

±5V

-6V

OPA703

DAC7678

10 F

0.1 F

10kW

Serial Interface

GND

DAC7678

www.ti.com

SBAS493A – FEBRUARY 2010 – REVISED AUGUST 2010

Long-Term Stability

Long-term stability/aging refers to the change of the

output voltage of a reference over a period of months

(5)

or years. This effect lessens as time progresses (see

Where:

Figure 3, the typical long-term stability curve). The

typical drift value for the internal reference is 100ppm

DIN = decimal equivalent of the binary code that

from 0 hours to 2160 hours. This parameter is

is loaded to the DAC register. It can range from 0

characterized by powering-up 19 units and measuring

to 4095 (12 bit)

them at regular intervals for a period of 2160 hours.

n = resolution in bits

Gain = 1 when External Reference is used and 2

Thermal Hysteresis

when internal reference is used.

Thermal hysteresis for a reference is defined as the

change in output voltage after operating the device at

(6)

25°C, cycling the device through the operating

temperature range, and returning to 25°C. Hysteresis

This result has an output voltage range of ±5V with

is expressed by Equation 4:

000h corresponding to a -5V output and FFFh

corresponding to a +5V output for the 12 bit

DAC7678.

(4)

Where:

VHYST = thermal hysteresis

VREF_PRE = output voltage measured at 25°C

pre-temperature cycling

VREF_POST = output voltage measured after the

device cycles through the temperature range of

–40°C to 125°C, and returns to 25°C.

DAC NOISE PERFORMANCE

Typical noise performance for the DAC7678 with the

Figure 96. Bipolar Output Range Using External

internal reference enabled is shown in Figure 47.

Reference at 5V

Output noise spectral density at the VOUTX pin versus

frequency is depicted in Figure 47 for full-scale,

midscale, and zero-scale input codes. The typical

MICROPROCESSOR INTERFACING

noise density for midscale code is 290nV/

√Hz at

A basic connection diagram to the SCL and SDA pins

1kHz and 117nV/

√Hz at 100 kHz when internal

of the DAC7678 is shown in Figure 97. The DAC7678

reference is enabled. The typical noise density

interfaces directly to standard mode, fast mode and

reduces to 104nV/

√Hz at 1kHz for mid scale code

high

speed

mode

2-Wire

compatible

serial

with external reference as shown in Figure 48.

interfaces. The DAC7678 does not perform clock

High-frequency noise can be improved by filtering the

stretching (pulling SCL low), as a result it is not

reference noise. Integrated output noise between

necessary to provide for this function unless other

0.1Hz and 10Hz is close to 3µVPP (midscale), as

devices on the same bus require this function. Pull-up

shown in Figure 49.

resistors are required on both the SDA and SCL lines

as the bus-drivers are open-drain. The size of these

BIPOLAR OPERATION USING THE DAC7678

pull-up resistors depends on the operating speed and

The DAC7678 family of products is designed for

capacitance of the bus lines. Higher value resistors

single-supply operation, but a bipolar output range is

consume less power but increase transition time on

also possible using the circuit in Figure 96. Rail-to-rail

the bus limiting the bus speed. Long bus lines have

operation at the amplifier output is achievable using

higher

capacitance

and

require

smaller

pull-up

an OPA703 as the output amplifier.

resistors to compensate. The resistors should not be

too small; if they are, bus drivers may not be able to

The output voltage for any input code can be

pull the bus lines low.

calculated with Equation 5.

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