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DAC7678SPW Datasheet(PDF) 30 Page - Texas Instruments

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Part # DAC7678SPW
Description  12-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output, Two-Wire Interface Digital-to-Analog Converter with 2.5V Internal Reference
PDF  52 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC7678SPW Datasheet(HTML) 30 Page - Texas Instruments

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DAC7678
SBAS493A – FEBRUARY 2010 – REVISED AUGUST 2010
www.ti.com
Broadcast Address Byte
2. Then send a command byte for the register to be
read. The device will acknowledge this event
Broadcast
addressing,
see
Table
15,
is
also
again.
supported by DAC7678. Broadcast addressing can
3. Then send a repeated start with the slave
be used for synchronously updating or powering
address and the R/W bit set to '1' for reading.
down
multiple
DAC7678
devices.
DAC7678
is
The device will also acknowledge this event.
designed
to
work
with
other
members
of
the
DACx578 family to support multichannel synchronous
4. Then the device writes the MSDB byte of the
update. Using the broadcast address, DAC7678
addressed
register.
The
master
should
responds regardless of the states of the address pins.
acknowledge this byte. Finally, the device writes
Broadcast is supported only in write mode (Master
out the LSDB of the register as shown in
writes to DAC7678).
Table 16.
An alternative reading method allows for reading back
DAC7678 I
2C READ SEQUENCE
the value of the last register written. The sequence is
To read any register other than the power-down
a start/repeated start with slave address and the R/W
register the following command sequence should be
bit set to '1', and the two bytes of the last register are
used:
read out.
1. Send a start or repeated start command with a
Note that it is not possible to use the broadcast
slave address and the R/W bit set to '0' for
address for reading.
writing. The device will acknowledge this event.
Table 14. LSDB
MSB
LSB
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
Least Significant Data Byte (LSDB)
Table 15. Broadcast Address Byte
MSB
LSB
1
0
0
0
1
1
1
0
Table 16. Read Sequence
S
MSB
…
R/W(0)
ACK
MSB
…
LSB
ACK
Sr
MSB
…
R/W(1)
ACK
MSB
…
LSB
ACK
MSB
…
LSB
ACK
Address Byte
Command/Access Byte
Sr
Address Byte
MSDB
LSDB
From master
Slave
From master
Slave
From master
slave
From Slave
Master
From Slave
Master
30
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Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): DAC7678



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