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DAC7678SPW Datasheet(PDF) 29 Page - Texas Instruments

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Part # DAC7678SPW
Description  12-Bit, Octal-Channel, Ultra-Low Glitch, Voltage Output, Two-Wire Interface Digital-to-Analog Converter with 2.5V Internal Reference
PDF  52 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DAC7678SPW Datasheet(HTML) 29 Page - Texas Instruments

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DAC7678
www.ti.com
SBAS493A – FEBRUARY 2010 – REVISED AUGUST 2010
Command and Access (CA) Byte
Table 11. Command and Access Byte
The Command and Access Byte, as shown in
MSB
LSB
Table 11, controls which command is executed and
C3
C2
C1
C0
A3
A2
A1
A0
which register is being accessed when writing to or
Command bits
Access bits
reading from the DAC7678. See Table 12 for a list of
write and read commands.
Table 12. Command and Access Byte Format(1)
C3
C2
C1
C0
A3
A2
A1
A0
DESCRIPTION
Write Sequences
0
0
0
0
A3
A2
A1
A0
Write to DAC input register channel n
0
0
0
1
A3
A2
A1
A0
Select to update DAC register channel n
Write to DAC input register channel n, and update all DAC registers (global
0
0
1
0
A3
A2
A1
A0
software LDAC)
0
0
1
1
A3
A2
A1
A0
Write to DAC input register channel n, and update DAC register channel n
0
1
0
0
X
X
X
X
Power down/on DAC
0
1
0
1
X
X
X
X
Write to clear code register
0
1
1
0
X
X
X
X
Write to LDAC register
0
1
1
1
X
X
X
X
Software reset
1
0
0
0
X
X
X
X
Write to internal reference register
1
0
0
1
X
X
X
X
Write to additional internal reference register
Read Sequences
0
0
0
0
A3
A2
A1
A0
Read from DAC input register channel n
0
0
0
1
A3
A2
A1
A0
Read from DAC register channel n
0
1
0
0
X
X
X
X
Read from DAC power down register
0
1
0
1
X
X
X
X
Read from clear code register
0
1
1
0
X
X
X
X
Read from LDAC register
1
0
0
0
X
X
X
X
Read from internal reference register
1
0
0
1
X
X
X
X
Read from additional internal reference register
Access Sequences
C3
C2
C1
C0
0
0
0
0
DAC channel A
C3
C2
C1
C0
0
0
0
1
DAC channel B
C3
C2
C1
C0
0
0
1
0
DAC channel C
C3
C2
C1
C0
0
0
1
1
DAC channel D
C3
C2
C1
C0
0
1
0
0
DAC channel E
C3
C2
C1
C0
0
1
0
1
DAC channel F
C3
C2
C1
C0
0
1
1
0
DAC channel G
C3
C2
C1
C0
0
1
1
1
DAC channel H
C3
C2
C1
C0
1
1
1
1
All DAC channels, broadcast update
(1)
Any sequences other than the ones listed are invalid; improper use can cause incorrect device functionality.
shown in Table 13 and Table 14. See Table 17 for a
Most Significant Data Byte (MSDB) and Least
complete list of write sequences and Table 18 for a
Significant Data Byte (LSDB)
complete list of read sequences. The DAC7678
updates at the falling edge of the acknowledge signal
The MSDB and LSDB contain the data that are
that follows the LSDB[0] bit.
passed to the register(s) specified by the CA byte, as
Table 13. MSDB
MSB
LSB
DB15
DB14
DB13
DB12
DB11
DB10
DB9
DB8
Most Significant Data Byte (MSDB)
Copyright © 2010, Texas Instruments Incorporated
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